19 results about "Current controlled oscillator" patented technology

A phase-locked loop (PLL) circuit is provided for generating an output signal having an output frequency. The PLL circuit includes a voltage-to-current conversion circuit, a frequency compensation circuit, and a current controlled oscillator (ICO). The voltage-to-current conversion circuit is configured to generate a first control current according to a control voltage, where the control voltage is generated according to a reference signal and a feedback signal obtained from an output signal. The frequency compensation circuit is configured to generate a second control current according to the control voltage. A current controlled oscillator (ICO) generates an output signal according to an oscillating current, where the oscillating current is a sum of the first control current and the second control current. In response to the frequency compensation circuit detecting that the control voltage exceeds the predetermined range, the second control current is controlled to be negatively correlated with the output frequency.

Embodiments of the present disclosure relate to semiconductor devices and semiconductor systems having the same. A semiconductor device includes: a pulse signal output circuit that provides a pulse signal to a transmitting electrode of an electrode pair; a current converter that converts a first current generated at a receiving electrode into a second current; a current-controlled oscillator that outputs an oscillation signal whose frequency depends on the second current; and a counter that counts the number of oscillations of the oscillation signal within each predetermined period; wherein the current converter includes a first constant current source and outputs a combined current of a first constant current source and the first current as the second current in response to the pulse signal, so that the semiconductor device suppresses an increase in circuit size.

A circuit for reducing a temperature-induced frequency drift in a voltage to current (V2I) converter based voltage-controlled oscillator (VCO) for at least one wide band phase-locked loop (PLL), the circuit includes a V2I resistor node of the V2I converter, the V2I resistor node being at one end of a resistor, the VCO, and a current controlled oscillator (CCO), and the circuit is configured to provide a fixed offset current to the V2I resistor node to cause at least one V2I output current to have a value conversely proportional to absolute temperature (CTAT), the at least one V2I output current being output by the V2I converter, and mirror the at least one V2I output current to the CCO to reduce the temperature-induced frequency drift at a lower frequency band of the VCO.

The invention relates to a temperature sensor chip with fully-integrated micro-watt-level power consumption applied to an RFID tag and a temperature digitization method thereof, and the temperature sensor chip comprises a temperature sensing module which is used for converting the temperature change into a current IPTAT which is positively correlated with the absolute temperature and inputting the current into a current control oscillator module; the current control oscillator module is used for converting the current IPTAT which is positively correlated with the absolute temperature into a frequency FPTAT which is positively correlated with the absolute temperature; the control circuit is used for generating a temperature-related frequency signal FRST through the reference current source; and the frequency-to-digital converter module is used for converting the frequency FPTAT in positive correlation with absolute temperature into digital output according to the frequency signal FRST. The temperature sensor chip provided by the invention has the characteristics of low power consumption and ultra-small area, is suitable for being integrated into a temperature sensor in a passive RFID tag, can accurately measure the temperature, and keeps low power consumption at the same time.

The invention discloses a low-ripple charge pump circuit, method and equipment based on a current control oscillator, and the circuit comprises a charge pump core unit, the clock input end of the charge pump core unit receives a clock signal, and the output end of the charge pump core unit generates pumping voltage; the input end of the voltage and current conversion unit is connected to the output end of the charge pump core unit, and the voltage and current conversion unit is used for converting the pumping voltage into first current; the current synthesis unit is used for receiving a reference current and the first current to obtain a control current; the control input end of the current control oscillator receives the control current, and the output end of the current control oscillator generates the clock signal; the oscillation frequency of the current control oscillator is in direct proportion to the control current; according to the charge pump circuit, continuous frequency modulation can be realized, so that the output ripple and electromagnetic interference are remarkably reduced, and the control precision of the output voltage is improved at the same time.

The invention provides a reconfigurable frequency-to-digital converter, and the converter comprises a multi-mode phase frequency detection module which carries out the frequency detection and phase detection of an input signal, and outputs a pulse error signal; the loop filter is used for filtering the pulse error signal and extracting a direct current component of the pulse error signal; the signal conversion module is used for converting the direct-current component into a current signal so as to control the multi-phase current control oscillator; the multi-phase current control oscillator is used for generating oscillation signals with different frequencies under the control of the input current signal and obtaining multi-phase clock output; the multi-mode frequency divider takes the signal output by the oscillator or the first register as input, and outputs the signal as a feedback signal to the multi-mode frequency and phase detection module after frequency division; the register is used for synchronously sampling the signal output by the oscillator so as to obtain phase information output at a sampling moment; the exclusive-OR gate is used for obtaining the difference of the two registers; and the decoder is used for counting the number of 1 in the output signal of the exclusive-OR gate so as to calculate the frequency information of the circuit at the moment.

The present invention discloses a temperature- and power supply voltage-adaptive ring oscillator, comprising a power supply voltage-to-current converter, a CTAT current generator, and a current-controlled oscillator. The power supply voltage-to-current converter is used to offset the negative and positive temperature characteristics generated in the circuit, outputting a first current proportional to the power supply voltage. The CTAT current generator is used to increase the width-to-length ratio of a MOS transistor with a preset threshold voltage to be greater than that of a MOS transistor with a conventional threshold voltage, outputting a second current with a negative slope linearly related to temperature. The current-controlled oscillator is used to take the total current (the sum of the first and second currents) as input and output an oscillation frequency. Compared with existing technologies, this device has a simple circuit structure, achieves dual compensation for temperature and power supply voltage, and can be widely used in SoC systems, improving the device's applicability.

In one embodiment, an apparatus includes a phase-locked loop circuit including: an input configured to receive an oscillating reference signal having a reference period; a current controlled oscillator (CCO) configured to generate an oscillating output signal based on an input signal; an error detector configured to generate one or more error signals based on a phase difference between the reference signal and one or more feedback signals, where the feedback signals are based on the oscillating output signal; and a charge pump circuit configured to receive at least a first one of the error signals, determine a voltage indicative of a duration of the first error signal during a first portion of the reference period, and provide a control current to the CCO for at least a remaining portion of the reference period, wherein the control current comprises at least a portion of the input signal delivered to the CCO and is based on the determined voltage.

The present invention discloses a voltage-controlled oscillator, which includes a current-controlled oscillator, a voltage-current conversion circuit, and a noise cancellation circuit. The current-controlled oscillator is configured to receive a bias current and generate an oscillation signal having an oscillation frequency according to the bias current. The voltage-current conversion circuit is coupled to a power supply voltage and is configured to generate a supply current according to an input voltage. The noise cancellation circuit is configured to receive a bias voltage and the supply current from the voltage-current conversion circuit, and is configured to generate a noise cancellation current in response to a change in the power supply voltage and cancel the noise cancellation current from the supply current to generate the bias current. The bias voltage of the noise cancellation circuit is coupled to an internal voltage of the voltage-current conversion circuit.

A process monitoring technique for transistor-based devices is described. The technique utilizes an oscillator-based sensor and operates in two phases: calibration and measurement. During calibration, the oscillator is supplied with a calibration current, and the resulting frequency is measured. A correction factor is calculated by dividing the measured frequency by the calibration current. In the measurement phase, the oscillator is supplied with current from the device under test, such as a memory cell or other transistor-based structure. The frequency produced is measured and divided by the correction factor to determine the current from the device. This approach yields a current value independent of parasitic resistances and capacitances in the oscillator. The technique enables accurate process variation monitoring with little modification to existing circuit structures and is applicable to various transistor-based devices, including SRAM cells, logic circuits, and analog circuits.

Disclosed herein is a DC-DC converter with an improved time-domain control system. The converter includes a DC-DC converter circuit, a feedback network, a high-pass filter, and a time-domain proportional-integral compensator circuit. The compensator circuit receives a feedback voltage and a filtered voltage, generates oscillating signals based on these voltages, and produces a drive signal by comparing the oscillating signals. Driver circuits control the converter circuit based on this drive signal. The time-domain compensator circuit includes transconductors, current-controlled oscillators, and a phase detector, implementing proportional-integral control in the time domain without delay lines. This approach offers improved response time and efficiency compared to traditional voltage-based or digital control methods.

A system comprises an oscillator circuit that includes first and second tuning banks and a current-controlled oscillator. The first tuning bank is connected to a voltage node and receives the tuning signal, generates a voltage drop at the voltage node that corresponds to the tuning signal, and allows the flow of a first current therethrough that varies with the voltage drop. The second tuning bank is connected to the voltage node and receives an oscillator input signal and regulates a second current that flows therethrough in response to a voltage difference between the voltage drop and the oscillator input signal. The current-controlled oscillator receives a third current that is a sum of the first and second currents and fine-tunes an oscillator output signal based on the third current to track a frequency of a reference input signal.

The invention discloses a global dynamic self-biased low-noise phase-locked loop circuit and electronic equipment. The global dynamic self-biased low-noise phase-locked loop circuit comprises a phase frequency detector, a charge pump, a current-to-voltage module, a comparison operational amplifier, a bias current mirror module, a voltage-to-current module, a current control oscillator, a feedback frequency dividing circuit and a low dropout regulator circuit, and the phase frequency detector, the charge pump, the current-to-voltage module, the comparison operational amplifier, the bias current mirror module, the voltage-to-current module and the current-controlled oscillator are connected in sequence so as to generate an output clock through the current-controlled oscillator. The invention aims to solve the problem of serious phase noise of a traditional phase-locked loop circuit in a high-speed and high-precision application scene, especially the problem of current mismatch of a charge pump, so that the phase-locked loop circuit bias has the characteristics of low noise and high speed.

In accordance with various embodiments of the present disclosure, a circuit to provide a reference current to a device having a first current controlled oscillator (CCO) is provided. In some embodiments, the circuit comprises a reference circuit and a feedback loop circuit. The feedback loop circuit comprises a differential circuit that receives an input voltage from the reference circuit and provides an output current, a second CCO that receives the output current from the differential circuit and produces an output frequency in response, a divider circuit to divide the output frequency into a feedback frequency, and a feedback switched capacitor resistor circuit providing a feedback voltage to the differential circuit based on the feedback frequency. The second CCO has substantially matching performance to the first CCO. The differential circuit adjusts its output current based on a difference between the input voltage and the feedback voltage.

The invention discloses a controllable resistor module linearly changing along with current and application of the controllable resistor module. A controllable resistor comprises an operational transconductance amplifier, a PMOS (P-channel Metal Oxide Semiconductor) tube PM1 and a PMOS tube PM2, the controllable resistor module can generate an equivalent resistor in direct proportion to a sampling current, so that the equivalent controllable resistor Rds and the Isense can be linearly correlated, the influence of process errors and temperature is small, the generated error is small, and the controllable resistor module can be applied to current-controlled oscillators, automatic gain control and other scenes needing controllable resistors.

The application discloses a kind of global dynamic self-bias low-noise phase-locked loop circuit and electronic equipment, the global dynamic self-bias low-noise phase-locked loop circuit of the present application includes frequency discriminator, charge pump, current-voltage module, comparison operational amplifier, bias current mirror module, voltage conversion current module, current control oscillator, feedback frequency division circuit and low-dropout linear regulator circuit, frequency discriminator, charge pump, current-voltage module, comparison operational amplifier, bias current mirror module, voltage conversion current module, current control oscillator are sequentially connected to generate output clock by current control oscillator.The present application aims to solve the problem of serious phase noise of traditional phase-locked loop circuit in high-speed high-precision application scene, especially the current mismatch of charge pump, so that the phase-locked loop circuit bias has the characteristics of low noise and fast speed.

The invention provides an oscillator and electronic equipment. The oscillator comprises a current control oscillator, a frequency divider, a ping-pong active integrator and an error amplifier which are electrically connected in sequence, the current control oscillator is used for generating an initial clock signal with an initial clock frequency; the frequency divider is used for performing frequency division processing on the initial clock signal to generate a frequency division clock signal; the ping-pong active integrator is used for generating a feedback voltage based on the frequency division clock signal; the error amplifier is used for generating error current based on the feedback voltage and the reference voltage; the current-controlled oscillator is further configured to output a target clock signal having a target clock frequency based on the error current. The feedback voltage is generated through the ping-pong active integrator, so that the error amplifier generates the error current to control the target clock frequency of the target clock signal to be within the preset range, closed-loop adjustment of the clock signal is achieved, the temperature stability of the clock signal is improved, the clock signal can cope with more complex use scenes, and universality is achieved.

Control circuits, integrated circuits, electronic converters and methods are disclosed. In a control circuit for a switching stage of an electronic converter, a phase detector generates a drive signal in response to a phase difference between a first clock signal and a second clock signal. The first clock signal and the second clock signal are generated by a first current-controlled oscillator and a second current-controlled oscillator, respectively. An operational transconductance amplifier generates first and second control currents in response to a difference between a reference and a feedback of the electronic converter, the first and second currents being applied to control the first and second current-controlled oscillators. In response to a switching clock having a first state, a switching circuit applies first and second bias currents to control inputs of the first and second current-controlled oscillators, respectively. Conversely, in response to the switching clock having a second state, the switching circuit applies the second and first bias currents to the control inputs of the first and second current-controlled oscillators, respectively.

The present disclosure relates to a digital phase-locked loop (PLL) circuit (100). The digital PLL circuit includes a phase frequency detector (102) configured to compare a phase difference between an input reference signal and a feedback signal from a current controlled oscillator, and generate a plurality of signals. An error to digital convertor (104) electrically 5 connected to the phase frequency detector (102) and configured to convert the plurality of signals into a plurality of digital signals. A digital controller (106) electrically connected to the error to digital convertor (104), and configured to process and convert the plurality of digital signals into a plurality of current signals. A current controlled oscillator (108) electrically connected to the digital controller (106), and configured to receive the plurality of 0 current signals from the digital controller (106) and control a phase of the feedback signal to synchronize with a phase of the input reference signal.