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Delay line circuit and its phase interpolation module

A phase interpolation and delay line technology, applied in the field of delay line circuits, can solve problems such as conflicting currents

Active Publication Date: 2016-02-17
ELITE SEMICON MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, when the phases of the input signals SI1 and SI2 are different from each other, conflicting currents will be generated between the inverters 4021 and 4022

Method used

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  • Delay line circuit and its phase interpolation module
  • Delay line circuit and its phase interpolation module
  • Delay line circuit and its phase interpolation module

Examples

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Embodiment Construction

[0033] The phase interpolation unit used to implement the delay line circuit of the present invention is described below. The delay line circuit includes at least one phase interpolation unit, and these phase interpolation units form at least one phase interpolation module. figure 2 A block diagram of a phase interpolation module 1100 according to an embodiment of the invention is shown.

[0034] refer to figure 2 , the phase interpolation module 1100 includes three identical phase interpolation units 1110 to 1130 . The phase interpolation unit 1110 includes three inverters 1112 , 1114 , 1116 and two resistors 1118 , 1119 . The output terminals of the inverters 1112 and 1114 are respectively connected to one terminal of the resistors 1118 and 1119 , while the input terminal of the inverter 1116 is coupled to the other terminal of the resistors 1118 and 1119 . The phase interpolation unit 1120 includes three inverters 1122 , 1124 , 1126 and two resistors 1128 , 1129 . The...

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PUM

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Abstract

The invention discloses a delay line circuit and a phase interpolation module thereof. In an embodiment of the invention, the phase interpolation module includes first, second and third phase interpolation units. Each of the first, second and third phase interpolation units includes a first inverter, a second inverter, a third inverter, a first resistor and a second resistor. The first electrical group is coupled between an output terminal of the first inverter and an input terminal of the third inverter. The second resistor is coupled between an output terminal of the second inverter and the input terminal of the third inverter. The first and second inverters in the first phase interpolation unit receive a first signal, the first and second inverters in the third phase interpolation unit receive a second signal, and the The first and second inverters in the second phase interpolation unit receive the first signal and the second signal respectively.

Description

technical field [0001] The invention relates to a delay line circuit, in particular to a delay line circuit implemented by phase interpolation and a phase interpolation module thereof. Background technique [0002] A delay line circuit is used in semiconductor devices to adjust the clock delay of signals such as input / output signals and clock signals. A delay line circuit with a phase interpolation circuit is one of the delay line circuits and has been widely used to adjust the timing of internal clock signals. [0003] The analog phase interpolation circuit uses analog components (such as adders, multipliers, mixers, amplifiers, etc.) to adjust the phase difference between the two reference clocks. Since time delays exist in these analog components, it is necessary to use delay compensation components to adjust the phase between the reference clock and the interpolation clock. Furthermore, there are different timing jitters and variations in the delay compensation element...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/14
Inventor 许人寿
Owner ELITE SEMICON MEMORY TECH INC