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Elimination method of zero-crossing distortion of output voltage of single-phase asymmetrical seven-level inverter

A zero-crossing distortion and output voltage technology, applied in the field of eliminating zero-crossing distortion of output voltage of single-phase asymmetric seven-level inverter, can solve the problems of zero-crossing voltage distortion, output voltage zero-crossing distortion, etc. The effect of zero-crossing distortion, simple algorithm, and easy digital realization

Inactive Publication Date: 2015-09-09
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to solve the problem of zero-crossing voltage distortion of the output voltage in the actual use of the existing hybrid asymmetric multi-level inverter, and to provide a single-phase asymmetric seven-level inverter output voltage The Elimination Method of Zero-Crossing Distortion

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  • Elimination method of zero-crossing distortion of output voltage of single-phase asymmetrical seven-level inverter
  • Elimination method of zero-crossing distortion of output voltage of single-phase asymmetrical seven-level inverter
  • Elimination method of zero-crossing distortion of output voltage of single-phase asymmetrical seven-level inverter

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specific Embodiment approach 1

[0036] Specific implementation mode one: the following combination figure 1 with Figure 5 Describe this implementation mode, the method for eliminating zero-crossing distortion of the output voltage of the single-phase asymmetrical seven-level inverter described in this implementation mode, the single-phase asymmetrical seven-level inverter is as follows figure 1 As shown, it includes DC power supply E, capacitor C1, capacitor C2, capacitor C3, power switch tube V1, power switch tube V2, power switch tube V3, power switch tube V4, power switch tube V5, power switch tube V6, power switch Tube V7, power switch tube V8, diode D1, diode D2, diode D3 and diode D4;

[0037] The positive pole of the DC power supply E is simultaneously connected to one end of the capacitor C1, the power input end of the power switch tube V1, and the power input end of the power switch tube V7;

[0038] After the capacitor C1, the capacitor C2 and the capacitor C3 are connected in series in sequence...

specific Embodiment approach 2

[0055] Specific implementation mode two: the following combination Figure 2 to Figure 4 , Figure 6 to Figure 8 Describe this implementation mode. This implementation mode will further explain the implementation mode 1. The multi-level modulation strategy is to use three modulation waves u r1 , u r2 , u r3 Compared with a triangular carrier wave, the comparison results are used as the control signals of the power switch tubes V1~V6 respectively,

[0056] modulation wave u r1 Positive half cycle u r1p =U nom sin(ω s t)-2U tr ;

[0057] Among them, U nom is the amplitude of the sine wave, ω s is the angular frequency of the sine wave, U tr is the amplitude of the triangular carrier wave;

[0058] modulation wave u r1 Negative half cycle u r1n =U tr +U nom sin(ω s t);

[0059] modulation wave u r2 Positive half cycle u r2p =U nom sin(ω s t)-U tr ;

[0060] modulation wave u r2 Negative half cycle u r2n = 2U tr +U nom sin(ω s t);

[0061] modulation ...

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Abstract

The invention discloses a method for eliminating zero crossing distortion of output voltage of a single-phase asymmetric seven-level inverter, belongs to the field of conversion of electrical energy, and solves the problem of zero crossing voltage distortion of output voltage of a hybrid asymmetric multilevel inverter. The method comprises steps as follows: an interval where a phase angle theta of the output voltage of the inverter is monitored, and corresponding operation instructions are executed according to different conditions: 1, when theta is larger than 0 degree and is smaller than or equal to delta theta, power switch tubes V3, V4, V5 and V8 are turned on, and the rest are turned off; 2, when theta is larger than delta theta and is smaller than or equal to the difference value obtained by subtracting delta theta from 180 degrees, control signals of V1-V6 are controlled with a multilevel modulation strategy, V8 is turned on, and V7 is turned off; 3, when theta is larger than the difference value obtained by subtracting delta theta from 180 degrees and is smaller than or equal to 180 degrees, V2, V3 and V4 are turned on, and the rest are turned off; 4, when theta is larger than 180 degrees and is smaller than or equal to the sum of 180 degrees plus delta theta, V2, V3,V4 and V7 are turned on, and the rest are turned off; 5, when theta is larger than the sum of 180 degrees plus delta theta and is smaller than or equal to 360 degrees, control signals of V1-V6 are controlled with a multilevel modulation strategy, V7 is turned on, and V8 is turned off; and 6, when theta is larger than the difference value obtained by subtracting delta theta from 360 degrees and is smaller than or equal to 360 degrees, V3,V4 and V5 are turned on, and the rest are turned off.

Description

technical field [0001] The invention relates to a method for eliminating zero-crossing distortion of an output voltage of a single-phase asymmetrical seven-level inverter, and belongs to the field of electric energy conversion. Background technique [0002] Compared with two-level DC-AC conversion technology, multi-level power conversion technology has lower voltage change rate stress and smaller voltage harmonic Wave content, and then only need smaller filter parameters, the volume and cost of the filter will also be significantly reduced. With the mature application of fully-controlled switching devices and the emergence of new fully-controlled devices such as IECT and IGCT, as well as the popularization of high-performance digital control technology with DSP and FPGA as the core, the research and application of multi-level inverters have been greatly improved. It has developed rapidly and has become a research hotspot in recent years. [0003] While the multi-level inve...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02M1/12
Inventor 骆素华吴凤江骆林松张陆捷冯帆
Owner HARBIN INST OF TECH
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