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Conditional programming of multibit memory cells

A memory unit, memory technology, applied in static memory, digital memory information, information storage and other directions, can solve problems such as shrinking technology nodes

Active Publication Date: 2014-01-29
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Eight-layer stacking can pose serious integration challenges for technology node shrinks

Method used

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  • Conditional programming of multibit memory cells
  • Conditional programming of multibit memory cells
  • Conditional programming of multibit memory cells

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Embodiment Construction

[0023] Various embodiments will be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. References made to specific examples and implementations are for purposes of illustration, and are not intended to limit the scope of the invention or the claims. The drawings are not to scale and illustrate well-known structures and devices in simplified form to facilitate describing the various embodiments.

[0024] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations. The terms "word line" and "bit line" are used herein to refer to electrical connections within and between an array of memory cells.

[0025]In various embodiments, memory cells are programmed by selectively ap...

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Abstract

Improved methods for programming multi-level metal oxide memory cells balance applied voltage and current to provide improved performance. Set programming, which transitions the memory cell to a lower resistance state, is accomplished by determining an appropriate programming voltage and current limit for the objective resistance state to be achieved in the programming and then applying a pulse having the determined set electrical characteristics. Reset programming, which transitions the memory cell to a higher resistance state, is accomplished by determining an appropriate programming voltage and optionally current limit for the state to be achieved in the programming and then applying a pulse having the determined electrical characteristics. The algorithm used to determine the appropriate set or reset programming voltage and current values provides for effective programming without stressing the memory element. The electrical characteristics for programming pulses may be stored in a data table used in a table look up algorithm.

Description

[0001] related application [0002] This application claims priority to US Application 13 / 051,885, filed March 18, 2011, which is hereby incorporated in its entirety. technical field [0003] The present application relates to semiconductor integrated circuits including memory arrays, and more particularly to methods of programming multi-level memory cells. Background technique [0004] The development of storage class memory (SCM) devices has blurred the distinction between storage (slow, inexpensive, and nonvolatile) and memory (fast, expensive and volatile). Metal-oxide multi-level cell (MLC) memory is one of the most promising candidates for realizing all SCM features such as non-volatility, short access time, low cost per bit, and solid-state requirements. Usually based on the measure item F 2 Or "square of feature size" to compare SCM cells. f 2 The smaller the measure, the more SCM cells per unit area. In a three-dimensional (3D) vertical memory array architectu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/56G11C13/00
CPCG11C13/0069G11C11/5685G11C2213/32G11C13/0007G11C11/5678G11C11/56G11C2013/0076G11C11/5664G11C2013/0071G11C2013/0092G11C2013/0073G11C13/0064G11C13/00
Inventor X.科斯塔Y.年R.朔伊尔莱恩T-Y.刘C.R.戈拉
Owner SANDISK TECH LLC