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A One-bit Full Subtractor Circuit

A technology of full subtractor and circuit, which is applied in the direction of calculation using non-contact manufacturing equipment and calculation using number system, which can solve the problem of increasing circuit area and achieve the effect of facilitating layout and wiring

Inactive Publication Date: 2016-06-08
XI AN JIAOTONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] At present, for the subtraction operation in the subtraction circuit and the division circuit, the subtrahend is usually reversed and added to one, and then the addition circuit is used to complete the operation. It is usually necessary to add a series of NOT gates or XOR gates, thereby increasing the circuit area.

Method used

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  • A One-bit Full Subtractor Circuit
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  • A One-bit Full Subtractor Circuit

Examples

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Embodiment Construction

[0021] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:

[0022] see figure 1 , the present invention includes symmetrically setting six-level NOR gates, and these six-level NOR gates are connected in series from input to output; The input terminals of the NOR gate and the fifth-level NOR gate are connected with the input signal, and the output terminal of the sixth-level NOR gate is used as the result output terminal. The input signal includes the minuend A, the subtrahend B, and the borrow Cin from the low bit; the output result includes the difference S and the borrow Cout to the high bit; where, the minuend A is input to the fourth-level NOR gate and the first-level NOR gate respectively. On the input terminal of the five-level NOR gate; the subtrahend B and the borrow Cin are both input to the input terminals of the first-level NOR gate and the second-level NOR gate.

[0023] The highest bit bor...

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PUM

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Abstract

The invention discloses a one-bit full subtracter circuit, which is suitable for subtraction and division operation. The circuit structurally comprises nine NOR gates. Inputs comprise a minuend A, a subtrahend B and a borrow bit Cin from a lower bit; outputs comprise a difference bit S and a borrow bit Cout to a high bit. A process from the input to the difference bit output or the borrow bit output passes through six stages of NOR gates, the circuit structure is symmetrical and the locating and the wiring are facilitated. The one-bit full subtracter circuit can be directly used for subtraction, the borrow bit output of the highest bit directly expresses a sign bit and the indirect operation process of subtraction completed by using an adding circuit after negation and plus one of subtrahend is avoided.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, in particular to a one-bit full subtractor circuit. Background technique [0002] At present, for the subtraction operation in the subtraction circuit and the division circuit, the subtrahend is usually inverted and added to one, and then the addition circuit is used to complete the operation. Usually, a series of NOT gates or XOR gates need to be added, thereby increasing the circuit area. [0003] In view of this, it is necessary to design a special full subtractor circuit, write the Boolean expression of the full subtractor by directly listing the truth table, and simplify it to reduce the number of required gates, making the circuit hardware resources reach minimum. Contents of the invention [0004] The purpose of the present invention is to solve the above-mentioned problems, provide a kind of full subtractor circuit, this circuit is suitable for subtraction operation and divisio...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/50
Inventor 雷绍充马璐钖魏晓彤
Owner XI AN JIAOTONG UNIV
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