The invention provides an optimized BCH (Bose-Chaudhuri-Hocquenghem) decoding method and device in a flash controller. The optimized BCH decoding method comprises the following steps of: reading
flash memory information, storing the
flash memory information in an FIFO (First Input First Output), and computing an adjoint functor according to the read information; solving a key equation, namely computing an
error location polynomial based on an iterative
algorithm according to the adjoint functor; verifying a root through
Chien Search according to the
error location polynomial to determine an
error location; and performing anti-error correction on error information of the error location so as to obtain error correction information in a
flash memory. In the step of solving the key equation, the conventional riBM
algorithm by using characteristics of a binary
BCH code is optimized, so that logic is almost reduced to half; and iterative
delay is only 1 / 2 of original
algorithm, so that the technical difficulty in ECC (Error
Correction Code)
logic complexity in a
flash memory controller is overcome. According to the optimized BCH decoding method and device, due to high-level symmetry and structuralization of circuits, balancing on
logic complexity and decoding
delay by adopting a laminated means is facilitated on one hand, wiring
layout at the rear end of a VLSI (
Very Large Scale Integrated Circuit) is facilitated on the other hand. The optimized riBM algorithm can also be applied to
digital television broadcasting, space communication and other application fields.