Static random access memory

Abstract

The invention discloses a static random access memory comprising a writing control circuit module, a first inverter circuit, a second inverter circuit and a reading buffer circuit, wherein the writing control circuit module is used for controlling the static random access memory; the first inverter circuit is coupled with the writing control circuit module to form a first storage node; the second inverter circuit is connected between a voltage source and a complementary voltage source; and the reading buffer circuit is coupled to a reading word line and a reading bit line and is coupled together with the first inverter circuit and the second inverter circuit to form a second storage node. The invention isolates the reading bit line from the second storage node by utilizing the reading buffer circuit and controls the state of information written by the static random access memory, thereby solving the problem of reading interference existing in the prior art.

Description

technical field [0001] The present invention relates to a semiconductor memory device, in particular to a static random access memory capable of eliminating read disturbance. Background technique [0002] Static Random Access Memory (SRAM) is often used in computer systems to temporarily store data. As long as there is continuous power supply, SRAM can maintain its stored state without any data update operation. An SRAM device includes an array of "cells," each of which can store a "bit" of data. A typical SRAM cell may include two cross-coupled inverters and two access transistors coupling the inverters to two complementary bit lines. Two access transistors are controlled by the word line to select the desired cell for a read or write operation. During a read operation, the access transistor is turned on to allow the charge remaining at the storage node of the cross-coupled inverter to be read through the bit line and the complementary bit line. During a write operation...

AI Technical Summary

Problems solved by technology

[0006] In order to overcome the shortcomings of read disturbance in the static random access memory of the prior art and the disadvantages of capacity expansion and layout and wiring caused by using more transistors to eliminate read disturbance, the main purpose of the present invention is to provide a static random access memory , which only uses six transistors and can eliminate the problem of read disturbance, which is conducive to capacity expansion and layout and wiring

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