Method for erasing single-transistor memory array
A technology of memory array and target memory, which is applied in the field of single-tube memory array erasing, and can solve problems such as increased reliability failure risk, raised threshold voltage, lack of monitoring and adjustment means, etc.
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[0029] One embodiment of the method for erasing a single-pipe memory array of the present invention is as follows: Figure 6 shown, including the following steps:
[0030] 1. Erase each target memory cell;
[0031] 2. Read the threshold voltage of each target memory cell, compare the current threshold voltage of each target memory cell with the same threshold voltage upper limit, if the current threshold voltage of a target memory cell is greater than the threshold voltage upper limit value, proceed to step 1, otherwise proceed to step 3;
[0032] 3. Ground the substrate and the source of each target memory cell, and connect the gate and the drain to the pulse voltage respectively;
[0033] Four. The current threshold voltage of each target memory unit is compared with the same threshold voltage lower limit value respectively, if the current threshold voltage of each target memory unit is greater than the threshold voltage lower limit value, then carry out step 7, otherwise ...
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