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Nonvolatile memory

A non-volatile, memory technology, applied in the field of semiconductors, can solve the problems of BitLine leakage, operation failure, etc., and achieve the effect of solving security risks and over-erasing leakage

Inactive Publication Date: 2014-09-17
GIGADEVICE SEMICON (BEIJING) INC
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  • Claims
  • Application Information

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Problems solved by technology

figure 2 There is an easily overlooked but serious problem in the traditional non-volatile memory Cell Array shown (still referred to as Sector x as an example), when the Sector x During the Erase operation, if a sudden power failure or Erase Suspend occurs, then the Sector x There may be a large number of Over Erased Cells in the Cell, then when the adjacent Sector x-1 When operating, Sector x-1 Medium and Sector x Adjacent WordLine WLN will Couple (coupling) Sector x WordLine WL1 in WL1, if the aforementioned OvefErased Cell happens to exist in the Cell unit in WL1, then it will cause BitLine leakage, which will cause the Sector x-1 Operation failed for

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Embodiment Construction

[0015] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0016] One of the core ideas of the present invention is that on the basis of the existing nonvolatile memory storage unit layout Cell Array, a word line Dummy WordLine is inserted between adjacent Sectors, which can effectively solve the problem of traditional nonvolatile memory storage unit layout. The potential safety hazard of over-erase leakage may be caused by the coupling of adjacent word lines between adjacent sectors in the layout.

[0017] refer to figure 2 , shows a structural diagram of an embodiment of a non-volatile memory of the present invention, the non-volatile memory may include a plurality of sectors, and the sectors may include N word lines and M bit lines , wherein each word line may include M memory cells,...

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Abstract

The invention provides a nonvolatile memory which comprises multiple sectors. Each sector contains N word lines and M bit lines, wherein each word line contains M memory cells, grid terminals of which are connected and drain terminals of which are respectively connected to the M bit lines; and after multiplexing, source terminals of the memory cells in adjacent word lines are connected to supply voltage VSOURCE. The nonvolatile memory also comprises K word lines Dummy WordLine connected between adjacent sectors, wherein K is an even number. The K is 2. According to the invention, the potential safety hazard of excessive erase electric-leakage caused by coupling of adjacent word lines between adjacent sectors in the layout of memory cells of a traditional nonvolatile memory can be effectively solved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a nonvolatile memory. Background technique [0002] In the traditional non-volatile memory Cell Array (storage unit layout), Sector x (sector) as an example, when the Sector x During the Erase (erase) operation, if there is a sudden power failure or Erase Suspend (suspended erase), then the Sector x There may be a large number of over-erased cells (Over Erased Cells) in the Cell, then when the adjacent Sector x-1 When operating, Sector x-1 Medium and Sector x Adjacent WordLine (word line) WLN will Couple (coupling) Sector x WordLine (word line) WL1 in WL1, if there is the aforementioned Over Erased Cell (over erased cell) in the Cell in WL1, then it will cause BitLine (bit line) leakage, which will cause the Sector x-1 The operation failed for . [0003] Taking traditional non-volatile memory as an example, refer to figure 1 , shows a structural block diagram of a ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/14
Inventor 苏志强丁冲张现聚
Owner GIGADEVICE SEMICON (BEIJING) INC