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Method Of Filling Through-holes

A disulfide and compound technology, applied in liquid chemical plating, electrical connection formation of printed components, coating, etc., can solve the problems of increasing the difficulty of filling through holes, damage or removal of electroless copper plating layer, etc.

Inactive Publication Date: 2014-09-17
ROHM & HAAS ELECTRONICS MATERIALS LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Also, thicker flash copper layers are capable of removing any oxides formed during storage by conventional etching processes that cannot be performed on thinner electroless copper layers without damage to the electroless copper layer or Removed risk
Unfortunately, electrolytic copper flash plating makes it difficult to fill vias

Method used

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  • Method Of Filling Through-holes
  • Method Of Filling Through-holes

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] Embodiment 1 (comparative example)

[0040] Two 5 cm wide, 15 cm long, and 100 μm thick FR4 / glass-epoxy coupons with multiple through holes were provided by Tech Circuit. The average diameter of the via holes was 100 μm. The coupons had a layer of electroless copper on one side and on the through-hole walls. The thickness of the copper layer on each sample is 0.3 μm. Both boards were pre-cleaned with a conventional copper cleaner. A sample is placed in a desiccator. Another sample was placed in an electroplating cell containing a copper electroplating bath whose composition is shown in Table 1.

[0041] Table 1

[0042] components

content

Copper Sulfate Pentahydrate

220g / L

sulfuric acid

40g / L

Chloride ions from hydrochloric acid

50ppm

polyethylene glycol

2g / L

4-Phenylimidazole / Imidazole / 1,4-Butanediol Diglycidyl Ether Copolymer

50mg / L

Bis-sodiumsulfopropyl)-disulfide

10mg / L

[00...

Embodiment 2

[0045] Embodiment 2 (comparative example)

[0046] Three FR4 / glass-epoxy coupons with multiple through holes, 5 cm wide, 15 cm long, and 100 μm thick, were provided by Tech Circuit. The average diameter of the via holes was 100 μm. The sample is adopted by CIRCUPOSITT TM 880 Electroless Plating Process Plating Recipes and Methods for Electroless Copper Plating Processing. The thickness of the electroless copper plating layer on each sample was 0.3 μm. Each coupon was cleaned and electroplated with a 5 μm thick layer of flash copper, as described in Example 1 above. Each sample was then placed in a desiccator during the transition period before further processing to prevent any copper oxide formation.

[0047] After removing the specimens from the desiccator, they were cleaned using a conventional copper cleaner to remove any possible oxide layer and to obtain a clean copper surface for plating. Each coupon was then placed into a separate plating cell containing a fresh pl...

Embodiment 3

[0049] Three FR4 / glass-epoxy coupons with multiple through holes, 5 cm wide, 15 cm long, and 100 μm thick, were provided by Tech Circuit. The average diameter of the via holes was 100 μm. The thickness of the electroless copper plating layer of the sample was 0.3 μm. Each circuit board was cleaned and electroplated with a 5 μm thick layer of flash copper, as described in Example 1 above. Each coupon was then stored in a desiccator prior to further processing and plating.

[0050] After removal from storage, the flash plated coupons were cleaned to remove any oxide layer and to obtain a clean copper surface for plating. After rinsing, the first coupon was transferred to a plating bath having the recipe in Table 1. The second coupon was first immersed in a 5.5 ppm aqueous solution of bis(3-sulfopropyl) disulfide, sodium salt (SPS) and 10 wt% sulfuric acid for 2 minutes before being transferred to the copper electroplating bath. at 1.5A / dm 2 Copper plating was performed at a...

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Abstract

The methods inhibit or reduce dimpling and voids during copper electroplating of through-holes with flash copper layers in substrates such as printed circuit boards. An acid solution containing disulfide compounds is applied to the through-holes of the substrate followed by filling the through-holes with copper using an acid copper electroplating bath which includes additives such as brighteners and levelers.

Description

technical field [0001] The present invention relates to a method of filling a via with a flash copper layer that reduces or inhibits the formation of dishing and voids. More specifically, the present invention relates to a method of filling a through hole with a copper flash layer by applying an aqueous acid pretreatment solution containing a low concentration of disulfide to the through hole with a copper flash layer, The via holes are then filled with copper using an acidic copper electroplating bath containing brighteners and leveling agents to reduce or inhibit dishing and void formation. Background technique [0002] High density interconnection is an important design in the manufacture of printed circuit boards with microvias and vias. The miniaturization of these devices relies on a combination of thinner core materials, reduced line widths, and smaller diameter vias and blind vias. The diameter of the via holes ranges from 75 μm to 200 μm. It has become increasing...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H05K3/42
CPCC25D5/02C25D5/34C25D3/38H05K3/425C23C18/1653C25D5/10H05K3/423
Inventor N·贾亚拉珠E·H·纳贾尔L·R·巴尔斯塔德
Owner ROHM & HAAS ELECTRONICS MATERIALS LLC
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