Compiling method and device for memory

Abstract

The invention provides a compiling method and a compiling device for a memory. The method comprises the following steps that a buffer writing instruction is input, and data in a buffer is subjected to zero clearing; addresses of N units in the memory and compiling data corresponding to each address are written into the buffer, wherein N is a positive integer; the N units are parallelly checked and compiled according to the compiling data in the buffer, wherein the compiling on any one unit refers to the operation of writing the compiling data corresponding to the unit in the buffer into the unit. The method and the device have the advantage that the compiling speed of the memory can be accelerated.

Description

technical field [0001] The present invention relates to the field of electronics, in particular to a memory writing method and device. Background technique [0002] With the rapid development of various electronic technologies and the rapid expansion of the electronic market, the demand for memory is growing rapidly. Among many memory types, NOR flash memory is widely used in various electronic devices, such as mobile products, automotive electronics, etc., due to its fast random read and write speed and high reliability. Since its development in 1988, NOR-type flash memory technology has been continuously improved and updated in line with market development needs. Not only has the capacity increased day by day, but also its reliability has become higher and higher, and the random read and write speed has also become faster and faster. [0003] For a memory, each unit cell corresponds to a word line and a bit line. If you want to program (write) a cell, you need to add a h...

AI Technical Summary

Problems solved by technology

The disadvantage is that writing data to multiple consecutive addresses will repeat the operation of multiple single addresses, wasting a lot of verify and program time

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