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Manufacturing method of semiconductor device

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as germanium-silicon stress layer damage

Active Publication Date: 2017-05-17
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a method for manufacturing a semiconductor device, so as to solve the problem of damage to the silicon germanium stress layer in the manufacturing process of the existing semiconductor device

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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Embodiment Construction

[0029] The manufacturing method of the semiconductor device proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0030] The SiGe stress layer is damaged during the manufacturing process of the existing semiconductor device, resulting in a decrease in device performance. The inventor has conducted in-depth research on this and found that the reason why the SiGe stress layer is damaged during the manufacturing process of the existing semiconductor devices is that after the SiGe stress layer is formed on the semiconductor device, it needs to go through acid solution...

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Abstract

The invention provides a semiconductor device manufacturing method. The method comprises the following steps: a semiconductor substrate is provided, wherein the semiconductor substrate comprises a PMOS region and an NMOS region; a PMOS gate is formed on the PMOS region; a first silicon oxide layer is formed on the side wall of the PMOS gate; a first silicon nitride layer is formed on the first silicon oxide layer; a second silicon oxide layer is formed on the first silicon nitride layer; a second silicon nitride layer is formed on the second silicon oxide layer; etching is carried out in the PMOS region to for a depression; a SiGe stress layer is formed in the depression; and the second silicon oxide layer and the second silicon nitride layer are removed, wherein the thickness of the first silicon oxide layer is greater than 40 angstrom. In the semiconductor device manufacturing method provided by the invention, the thickness of the first silicon oxide layer is increased, the SiGe stress layer can be ensured not to be exposed during the technological process, reaction between the SiGe stress layer and a stripping liquid can be avoided and the SiGe stress layer can be prevented from being damaged.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method of a semiconductor device. Background technique [0002] As the size of semiconductor devices shrinks day by day, relying on the traditional method of reducing the thickness of the gate oxide layer can no longer meet the development needs. Therefore, people have to improve device performance through other methods, such as stress enhancement technology. Stress enhancement technology increases the mobility of carriers by applying stress to the channel region. At present, silicon germanium (SiGe) is used as a compressive stress material in semiconductor manufacturing to improve the performance of PMOS. The usual practice is to replace traditional silicon (Si) with silicon germanium (SiGe), and form a silicon germanium (SiGe) stress layer in the source / drain region of PMOS through selective epitaxial growth. [0003] Silicon germanium (Si...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8238H01L21/316
CPCH01L21/823864
Inventor 刘焕新
Owner SEMICON MFG INT (SHANGHAI) CORP