48results about How to "Reduce plasma damage" patented technology

The present invention provides a plastic container or bottle having an inner wall surface coated with a DLC film which has the same level of oxygen barrier property as prior art DLC coated containers while at the same time preventing the coloration of the neck portion found in the containers of the prior art. The DLC film formed on the neck portion of the inventive bottle has a lower graphite mixing proportion than the DLC film formed on body portion, and the oxygen permeability of the container is less than or equal to 0.0050 ml / container (500 ml PET container) / day. The apparatus and the method of producing such a bottle are also described.

The present invention provides a plastic container having a inner wall surface coated with DLC film which has same level of oxygen barrier property as prior art and can prevent a coloring of the DLC film formed on a neck portion of the container, manufacturing apparatus therefor and manufacturing method thereof.The apparatus for manufacturing the DLC film coated plastic container, comprising: a container side electrode which forms one portion of a pressure-reducing chamber which houses a container formed from plastic, a facing electrode which faces said container side electrode and is arranged inside said container or above said opening, wherein said container side electrode and said facing electrode are made to face each other via an insulating body which forms a portion of said pressure-reducing chamber, source gas supply means which includes a supply gas inlet pipe, exhaust means, and high frequency supply means; wherein said container side electrode is formed so that the average inner hole diameter of the inner wall surrounding said neck portion when the container is housed becomes smaller than the average inner hole diameter of the inner wall surrounding said body portion, and the average distance between the outer wall of said container and the inner wall of said container side electrode in a horizontal cross section with respect to the vertical direction of said container at said neck portion becomes longer than the average distance between the outer wall of said container and the inner wall of said container side electrode in a horizontal cross section with respect to the vertical direction of said container at said body portion.

Methods of minimizing or eliminating plasma damage to low k and ultra low k organosilicate intermetal dielectric layers are provided. The reduction of the plasma damage is effected by interrupting the etch and strip process flow at a suitable point to add an inventive treatment which protects the intermetal dielectric layer from plasma damage during the plasma strip process. Reduction or elimination of a plasma damaged region in this manner also enables reduction of the line bias between a line pattern in a photoresist and a metal line formed therefrom, and changes in the line width of the line trench due to a wet clean after the reactive ion etch employed for formation of the line trench and a via cavity. The reduced line bias has a beneficial effect on electrical yields of a metal interconnect structure.

Plasma damage in ultra low k dielectric materials during formation of a dual damascene metal interconnect structure is reduced by providing a protective spacer on sidewalls of a line trench. A densified trench bottom region may be additionally formed directly beneath an exposed horizontal surface of the line trench. The protective spacer and / or the densified trench bottom region protects an ultra low k intermetal dielectric layer from plasma damage during a plasma strip process that is used to remove a disposable via fill plug employed in the dual damascene metal interconnect structure.

A method of manufacturing a thin film transistor matrix substrate is provided. The first photo-mask process is used to define a gate electrode and a signal electrode. The second photo-mask process is used to obtain different thickness of a PR layer in different regions for forming a channel, gate electrode through holes, signal electrode through holes and conductive pads. The third photo-mask process is used to define a source, a drain, an upper signal electrode, a pixel electrode, gate electrode pads and signal electrode pads.

A wiring member which becomes substantially symmetrical on the plane of an electrostatic chuck unit is connected to the tip end of an RF introduction rod between the RF introduction rod and the electrostatic chuck unit in order to make uniform generation of an electric field due to bias RF which becomes a cause of plasma damage. The connection point between the electrostatic chuck unit and the wiring member may be single or plural.

In a semiconductor device including an oxide semiconductor, the amount of oxygen vacancies is reduced. Moreover, electrical characteristics of a semiconductor device including an oxide semiconductor are improved. The semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, an oxide semiconductor film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the oxide semiconductor film; and over the transistor, a first insulating film covering the gate insulating film, the oxide semiconductor film, and the pair of electrodes; and a second insulating film covering the first insulating film. An etching rate of the first insulating film is lower than or equal to 10 nm / min and lower than an etching rate of the second insulating film when etching is performed at 25° C. with 0.5 weight % of hydrofluoric acid.

In a substrate nitriding method for nitriding a target substrate by allowing a nitrogen-containing plasma to act on silicon on a surface of the substrate in a processing chamber of a plasma processing apparatus, the nitridation by the nitrogen-containing plasma is performed by controlling a sheath voltage Vdc around the substrate to be less than or equal to about 3.5 eV. The sheath voltage Vdc is a potential difference Vp−Vf between a plasma potential Vp in a plasma generating region and a floating potential Vf of the substrate.

A film deposition apparatus includes a turntable having a substrate mounting area, a first plasma gas supplying part, a second plasma supplying part, a first plasma gas generating part to convert the first plasma generating gas to first plasma, and a second plasma generating part provided away from the first plasma generating part in a circumferential direction and to convert the second plasma generating gas to second plasma. The first plasma generating part includes an antenna facing the turntable so as to convert the first plasma generating gas to the first plasma, and a grounded Faraday shield between the antenna and an area where a plasma process is performed, and to include plural slits respectively extending in directions perpendicular to the antenna and arranged along an antenna extending direction to prevent an electric field from passing toward the substrate and to pass a magnetic field toward the substrate.

A method for forming a thin film includes: supplying an additive gas, a dilution gas, and a silicon-containing source gas into a reaction chamber wherein a substrate is placed; forming a thin film on the substrate by plasma CVD under a given pressure with a given intensity of radio-frequency (RF) power from a first point in time to a second point in time; at the second point in time, stopping the supply of the silicon-containing source gas; and at the second point in time, beginning reducing but not stopping the RF power, and beginning reducing the pressure, wherein the reduction of the RF power and the reduction of the pressure are synchronized up to a third point in time.

A method of forming an HDP-CVD pre-metal dielectric (PMD) layer to reduce plasma damage and / or preferential sputtering at a reduced a thermal budget including providing a semiconductor substrate comprising at least two overlying semiconductor structures separated by a gap; forming a PMD layer according to an HDP-CVD process over the at least two overlying semiconductor structures without applying a chucking bias Voltage to hold the semiconductor substrate.

A method for fabricating a semiconductor device includes etching a portion of a substrate to form a recess. A polymer layer fills a lower portion of the recess. Sidewall spacers are formed over the recess above the lower portion of the recess. The polymer layer is removed. The lower portion of the recess is isotropically etching to form a bulb-shaped recess.