47results about How to "Reduce plasma damage" patented technology

A film deposition apparatus includes a turntable having a substrate mounting area, a first plasma gas supplying part, a second plasma supplying part, a first plasma gas generating part to convert the first plasma generating gas to first plasma, and a second plasma generating part provided away from the first plasma generating part in a circumferential direction and to convert the second plasma generating gas to second plasma. The first plasma generating part includes an antenna facing the turntable so as to convert the first plasma generating gas to the first plasma, and a grounded Faraday shield between the antenna and an area where a plasma process is performed, and to include plural slits respectively extending in directions perpendicular to the antenna and arranged along an antenna extending direction to prevent an electric field from passing toward the substrate and to pass a magnetic field toward the substrate.

A manufacturing method of a semiconductor device includes the step for forming a silicon nitride film having a first part where arsenic is included and a second part where less amount of or substantially no arsenic is included, the step for removing at least a portion of the first part by dry etching, and the step for removing at least a portion of the second part by wet etching. Since arsenic in the silicon nitride film is removed by dry etching, arsenic is never eluted into the wet etching liquid from the silicon nitride film during subsequent wet etching. Therefore, one can prevent the wet etching from being contaminated. Etching of the silicon nitride film is performed by a combination of dry etching and wet etching. Therefore, compared with the case where etching is performed only by dry etching, plasma damage to the region exposed in the plasma atmosphere except for the silicon nitride film can be decreased.

The present invention provides a plastic container having a inner wall surface coated with DLC film which has same level of oxygen barrier property as prior art and can prevent a coloring of the DLC film formed on a neck portion of the container, manufacturing apparatus therefor and manufacturign method thereof. The apparatus for manufacturing the DLC film coated plastic container, comprising: a container side electrode which forms one portion of a pressure-reducing chamber which houses a container formed from plastic, a facing electrode which faces said container side electrode and is arranged inside said container or above said opening, wherein said container side electrode and said facing electrode are made to face each other via an insulating body which forms a portion of said pressure-reducing chamber, source gas supply means which includes a supply gas inlet pipe, exhaust means, and high frequency supply means; wherein said container side electrode is formed so that the average inner hole diameter of the inner wall surrounding said neck portion when the container is housed becomes smaller than the average inner hole diameter of the inner wall surrounding said body portion, and the average distance between the outer wall of said container and the inner wall of said container side electrode in a horizontal cross section with respect to the vertical direction of said container at said neck portion becomes longer than the average distance between the outer wall of said container and the inner wall of said container side electrode in a horizontal cross section with respect to the vertical direction of said container at said body portion.

A method of manufacturing a thin film transistor matrix substrate is provided. The first photo-mask process is used to define a gate electrode and a signal electrode. The second photo-mask process is used to obtain different thickness of a PR layer in different regions for forming a channel, gate electrode through holes, signal electrode through holes and conductive pads. The third photo-mask process is used to define a source, a drain, an upper signal electrode, a pixel electrode, gate electrode pads and signal electrode pads.

A method by which generation of leak current can be suppressed and also a fine element can be formed by performing element isolation at a temperature at which a glass substrate can be used is provided. The method includes a first step of forming a base film over a glass substrate; a second step of forming a semiconductor film over the base film; a third step of forming, over the semiconductor film, a film preventing oxidation or nitridation of the semiconductor film into a predetermined pattern; and a fourth step of performing element isolation by radical oxidation or radical nitridation of a region of the semiconductor film, which is not covered with the predetermined pattern, at a temperature of the glass substrate lower than a strain point thereof by 100° C. or more, where radical oxidation or radical nitridation is performed over a semiconductor film placed apart from a plasma generation region, in a plasma treatment chamber with an electron temperature within the range of 0.5 to 1.5 eV, preferably less than or equal to 1.0 eV, and an electron density within the range of 1×10¹¹cm⁻³ to 1×10¹³cm⁻³.

In a substrate nitriding method for nitriding a target substrate by allowing a nitrogen-containing plasma to act on silicon on a surface of the substrate in a processing chamber of a plasma processing apparatus, the nitridation by the nitrogen-containing plasma is performed by controlling a sheath voltage V_dc around the substrate to be less than or equal to about 3.5 eV. The sheath voltage V_dc is a potential difference V_p−V_f between a plasma potential V_p in a plasma generating region and a floating potential V_f of the substrate.

A semiconductor device includes a first insulating film formed on a semiconductor substrate; a second insulating film formed on the first insulating film and having a recess corresponding to a capacitor region; a lower electrode formed in the recess; a capacitor dielectric film formed on the lower electrode; and an upper electrode formed on the capacitor dielectric film. The semiconductor device further includes a conductive portion formed in the first insulating film and the second insulating film for electrically connecting the semiconductor substrate to the upper electrode.

In a film forming method, firstly, a processing target substrate W as a base of a semiconductor device is held on a mounting table 34 by an electrostatic chuck. Then, a film forming gas is adsorbed onto the processing target substrate W (a gas adsorption process) ((A) of FIG. 6). Thereafter, the inside of the processing chamber 32 is evacuated in order to remove residues of the film forming gas ((B) of FIG. 6). Upon the completion of the first exhaust process, a plasma process using microwave is performed ((C) of FIG. 6). Upon the completion of the plasma process, the inside of the processing chamber 32 is evacuated in order to remove an unreacted reactant gas and the like ((D) of FIG. 6). These series of steps (A) to (D) are repeated in this sequence until a desired film thickness is obtained.

A semiconductor device manufacturing method, the method including: forming a semiconductor element on a semiconductor substrate; and by using microwaves as a plasma source, forming an insulation film on the semiconductor element by performing a CVD process using microwave plasma having an electron temperature of plasma lower than 1.5 eV and an electron density of plasma higher than 1×10¹¹ cm⁻³ near a surface of the semiconductor substrate.

A method of forming plasma used in a process of manufacturing a semiconductor device and a method of forming a layer for a semiconductor device using the plasma are disclosed. The plasma forming method includes forming a plasma region in a sealed space by supplying a plasma source gas into the sealed space at a first flow rate and maintaining the plasma region by supplying a plasma maintenance gas into the sealed space at a second flow rate higher than the first flow rate. The plasma source gas includes a first gas having a first atomic weight, and the plasma maintenance gas includes a second gas having a second atomic weight lower than the first atomic weight. The plasma source gas includes argon and the plasma maintenance gas includes helium. The method may further include forming the layer on a wafer by supplying a source gas into the sealed space.

A process for photoresist layer removal from a semiconductor wafer comprises exposing at relatively high temperature the wafer to an RIE-free microwave-energy-generated plasma of a primary gas mixture, the exposing causing photoresist removal such as by ashing. The method also comprises determining an endpoint to the removal by a determined change in the visible light emanating from a chamber containing the wafer. A multi-step process of the present invention comprises the above method and a preliminary RIE-free microwave-energy-generated plasma that solubilizes polymer on walls of vias of the wafer. This multi-step process also comprises, following the exposing step, a cooling step, a cooling step with a temperature check, and a deglazing step. The deglazing step also uses an RIE-free microwave-energy-generated plasma. Specific gas mixtures for the respective plasmas are exemplified. Other embodiments of methods of the present invention are comprised of less steps, or a consolidation of such steps.

The present invention provides an organic electroluminescence element in which an anode layer 2, a light emitting unit 3, and a cathode layer 4 which each have optical permeability are stacked on a transparent substrate 1, the cathode layer 4 including a first charge generation layer 4a and a cathode 4c. The cathode 4c is formed by way of a facing target sputtering method. Even in the case where a cathode material which has optical permeability is used, the organic electroluminescence element is driven at a low applied voltage, has no angle dependability of an emission spectrum, and has high luminous efficiency.

A method for fabricating a semiconductor device includes etching a portion of a substrate to form a recess. A polymer layer fills a lower portion of the recess. Sidewall spacers are formed over the recess above the lower portion of the recess. The polymer layer is removed. The lower portion of the recess is isotropically etching to form a bulb-shaped recess.

A test structure includes a transistor, a dummy transistor and a pad unit. The transistor is formed on a first active region of a substrate. The dummy transistor is formed on a second active region of the substrate and electrically connected to the transistor. The pad unit is electrically connected to the transistor. Plasma damage to the transistor is reduced due to the presence of dummy transistor.

The invention provides a method for manufacturing a self-aligned silicide barrier layer, which is characterized in that dry etching is carried out on the self-aligned silicide barrier layer by adopting the etching power being not greater than 180W and the oxygen flow rate of 5sccm-7sccm, plasma damages in the etching process can be reduced, diffusion of a polymer generated by etching towards the edge of a semiconductor substrate is reduced, and an effect of giving consideration to the etching rate and the etching uniformity is achieved, thereby acquiring a uniform graphical self-aligned silicide barrier layer with excellent performance, avoiding offset of device performance design indicators, and improving the product yield.

According to the embodiment, there is provided a solar cell including: a back electrode layer; a light absorbing layer on the back electrode layer; a buffer layer on the light absorbing layer; and a front electrode layer on the buffer layer, wherein the front electrode layer comprises an intrinsic region and a doping region having a conductive dopant, and a concentration of the conductive dopant is gradually lowered in upward and downward directions from an excess doping region of the doping region.