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Condition type triggering high-speed synchronous collecting and recording system with expandable channels

A high-speed synchronization and recording system technology, applied in the direction of instrumentation, electrical digital data processing, etc., can solve problems such as useless signals, difficult expansion of acquisition channels, and poor versatility, and achieve the effect of convenient secondary development and improved expansion capabilities

Active Publication Date: 2015-01-28
NAT UNIV OF DEFENSE TECH
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Such a design has poor versatility, the acquisition channel is difficult to expand, and the design of acquisition control and human-computer interaction is relatively complicated.
Especially in the case of large-scale expansion, such as simultaneous acquisition of hundreds of channels, the expansion development will be more difficult, and often requires redesign
On the other hand, if the collected signal data is stored without selective inspection, many useless signals will be obtained, which will greatly increase the difficulty and workload of subsequent analysis and processing of the stored data

Method used

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  • Condition type triggering high-speed synchronous collecting and recording system with expandable channels
  • Condition type triggering high-speed synchronous collecting and recording system with expandable channels
  • Condition type triggering high-speed synchronous collecting and recording system with expandable channels

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Embodiment Construction

[0028] The present invention mainly includes a clock module, an acquisition module, a storage module and a mainboard controller, and the overall structure is as follows: figure 1 shown.

[0029] Such as figure 1As shown, the clock module, acquisition module, and storage module are interconnected with the mainboard controller through the PCIE interface. The clock module can output accurate synchronous clock signals and synchronous trigger signals, and drive the acquisition module to perform high-speed synchronous acquisition of input analog signals. The acquired data is in The high-speed writing storage module under the motherboard controller is permanently stored, and the frequency of the clock signal and the source of the trigger signal can be set, and the judgment signal output by the acquisition module is connected to the clock module to realize conditional triggering.

[0030] When the system expands the acquisition channel in the motherboard, its structure is as follows:...

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Abstract

The invention discloses a condition type triggering high-speed synchronous collecting and recording system with expandable channels. The system comprises a clock module, a collection module, a storage module and a mainboard controller. The clock module, the collection module and the storage module are mutually connected with the mainboard controller through a PCIE interface. The clock module can output accurate synchronous clock signals and synchronous triggering signals to drive the collection module to carry out high-speed synchronous collection on input analog signals, the collected data are written into the storage module for permanent storage at a high speed under the effect of the mainboard controller, wherein frequencies of clock signals and sources of triggering signals can be set, and judgment signals output by the collection module are accessed into the clock module for condition type triggering. Compared with the prior art, the method has the advantages that the channels are expandable, synchronous collection and condition type triggering are achieved, collection can be carried out through multiple modes, secondary development is facilitated, the man-computer interaction design is simple, and other advantages.

Description

technical field [0001] The invention specifically relates to the technical field of data acquisition and recording systems, and in particular to a data acquisition and recording system that requires module expansion, efficient acquisition of useful data, and acquisition synchronization in a large-scale array and large-capacity signal parallel acquisition environment. Background technique [0002] At present, most of the high-speed acquisition systems developed around the world use FPGA chips to control AD ​​chips to achieve data acquisition, and select chips and design structures for specific needs. The acquisition system developed mainly focuses on the acquisition of specific signals in certain related fields and the design of integration on a single board. Acquisition systems with specific functions or integrated on a single board, such as distributed POS sub-IMU data acquisition systems, multi-channel vibration data acquisition systems, etc., have special structures accor...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/20
Inventor 王壮程翥王琦刘海涛王梦南苗可可黄达张雪婷朱世宇
Owner NAT UNIV OF DEFENSE TECH
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