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Sampling value linear interpolation calculation device based on FPGA (Field Programmable Gate Array) and calculation method

A linear interpolation and sampling value technology, which is applied to calculations using numerical representations and calculations using non-contact manufacturing equipment, can solve problems such as shortage of FPGA chip hardware resources, increased costs, and inconvenient popularization of processors. Save hardware costs, ensure normal operation, and save resource usage

Active Publication Date: 2015-03-04
INTEGRATED ELECTRONICS SYST LAB
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the need for division during calculation, and the resources occupied by the division operation are relatively large, the hardware resources of the FPGA chip are tight; at the same time, addition, subtraction, and multiplication operations need to be repeated during the operation process. If no measures are taken, it will further cause FPGA chips. The hardware resources of the
In view of these situations, if a large-capacity chip is used, the cost will increase significantly, which is not convenient for the popularization of the processor.

Method used

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  • Sampling value linear interpolation calculation device based on FPGA (Field Programmable Gate Array) and calculation method
  • Sampling value linear interpolation calculation device based on FPGA (Field Programmable Gate Array) and calculation method

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Embodiment Construction

[0037] An FPGA-based sampling value linear interpolation operator is used to obtain the sampling value Vx at the tx time according to the sampling values ​​V1 and V2 collected by the variable Vt at the time t1 and t2. The linear interpolation calculation formula is: ,Such as figure 1 As shown, it includes an adder / subtractor, a multiplier, an operation data scheduler (the two parts of the operation data scheduler A and B in the figure are actually the same module, and will not be distinguished in the subsequent description), a table lookup unit, and a truncation operator And judge the overrunning device, each module is connected through the data transmission line for data transmission. The table lookup unit uses t2-t1-T as the address to query the built-in storage block of the FPGA chip, and the storage depth is the number of frame interval values ​​that do not exceed the limit, and each frame interval value corresponds to the address of a storage unit of the storage modu...

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Abstract

The invention relates to a sampling value linear interpolation calculation device based on a FPGA (Field Programmable Gate Array) and a calculation method. The calculation device comprises a summator / subtractor, a multiplying unit, a calculation data dispatcher, a lookup unit and a truncation calculation device; a linear interpolation calculation formula is gradually split by middle parameters and is classified into addition and subtraction, and multiplying operation; the middle parameters are loaded in steps by adopting a time division multiplexing manner to carry out calculation, looking up and reading a proportionality coefficient k according to a current data frame receiving moment interval t2-t1 and a preset lower limiting value T, and utilizing the proportionality coefficient k into the truncation calculation device to replace a division method to be used for the linear interpolation calculation, so as to obtain a required Vx value. According to the sampling value linear interpolation calculation device, the direct division method operation is saved by a lookup manner and the quantity of the summator / subtractor and the multiplying unit is reduced by a time division multiplexing manner, so that a lot of resources are saved. An original extremely tensioned hardware resource occupation condition is effectively remitted under the precondition of finishing an existing function, and resource allowance is remained for product up-gradation under the condition that an FPGA chip is not replaced at the later period.

Description

technical field [0001] The invention relates to the technical field of substation sampling value processing, in particular to an FPGA-based linear interpolation arithmetic unit and operation method for sampling values. Background technique [0002] Interpolation operation is one of the important functions of the sampling value processing device of the smart substation, which is used to transform the data stream collected from afar into a data stream equivalent to that collected locally. Linear interpolation is the most basic and commonly used type of interpolation. It utilizes the sampling values ​​V1 and V2 collected from the variable Vt at time t1 and t2, and assumes the sampling value Vx at time tx in the Vt-t coordinate system It is on a straight line with V1 and V2, so the value of Vx can be obtained by solving the linear equation, and its operation formula is . Due to the need for division during calculation, and the resources occupied by the division operation are ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/48
Inventor 林伟魏欣王秀广李波
Owner INTEGRATED ELECTRONICS SYST LAB
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