System level model building method of multiple core sharing SIMD coprocessor

Abstract

Disclosed is a system level model building method of a multiple core sharing SIMD coprocessor. The system level model building method of the multiple core sharing SIMD coprocessor comprises an SOC (system on chip), wherein n cores and n vector coprocessors are arranged on the SOC, n is a positive even number, and the n vector coprocessors are connected with the n cores through a crossbar switch. The system level model building method of the multiple core sharing SIMD coprocessor further comprises a dispatcher connected with the n cores, the n vector coprocessors and the crossbar switch, and used to dispatch the vector coprocessors to communicate with the n cores through the crossbar switch, wherein the dispatcher dispatches the vector coprocessor according to current states of the vector coprocessors. The system level model building method of the multiple core sharing SIMD coprocessor significantly improves resource utilization rate of the multiple core sharing SIMD coprocessor through a sharing mechanism, and reduces system power consumption, and furthermore, compared with the prior art, the system level model building method of the multiple core sharing SIMD coprocessor efficiently completes a task under the circumstance that the quantity of resources is fixed.

Description

technical field [0001] The invention relates to a system-level model of a processor. In particular, it involves a system-level model building method for multi-core shared SIMD coprocessors. Background technique [0002] SIMD (Single Instruction Multiple Data) is a data-level parallel technology that performs the same operation on multiple data. The key to SIMD technology is to perform multiple operations simultaneously in a single instruction to increase the throughput of the processor. This feature makes SIMD technology especially suitable for data-intensive operations such as multimedia applications. Now mainstream processors have their SIMD instruction subsets, such as MMX or SSE of X86, NEON instruction subset of ARM, Altivec instruction subset of PowerPC, etc. In modern multi-core processors, each core on the processor is usually equipped with a dedicated SIMD coprocessor, also known as Vector Coprocessor (VP). However, due to its proprietary nature, when one core ex...

AI Technical Summary

Problems solved by technology

When a core is not executing data-intensive programs, the VP is idle, resulting in waste of resources and power consumption

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