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A phase change memory management method and device

A technology of phase-change memory and management method, which is applied in the direction of information storage, static memory, digital memory information, etc., can solve the problem of large write operation time delay, achieve the effect of reducing time delay and avoiding the time-consuming effect of writing 1

Active Publication Date: 2017-08-25
HUAWEI TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

It can solve the problem of large write operation time delay in the phase change memory in the prior art

Method used

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  • A phase change memory management method and device
  • A phase change memory management method and device
  • A phase change memory management method and device

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Embodiment Construction

[0048] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0049] see figure 1 , is a schematic flowchart of a phase-change memory management method according to the first embodiment of the present invention. In this embodiment, the method includes:

[0050] S101. Query free pages in the phase change memory.

[0051] Specifically, the free page refers to an unoccupied physical page in the phase change memory. When the operating system needs to run a process, the CPU will allocate a section of unoccupied physical page from...

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Abstract

The embodiment of the present invention discloses a phase change memory management method, which includes querying free pages in the phase change memory; performing a filling 1 operation on each bit of the free page to generate a filling page; receiving a write operation on the filling page , determine the address of the bit that needs to be written with 0 in the filling page according to the write operation, and write 0 to the bit corresponding to the bit address. The embodiment of the invention also discloses a phase change memory management device. With the present invention, when performing a write operation on the filling page, only 0 can be written to the filling page instead of writing 1, which avoids the time-consuming shortcoming of writing 1 to the memory page in the prior art, and can effectively reduce the time delay of the writing operation .

Description

technical field [0001] The invention relates to the field of computers, in particular to a phase change memory management method and device. Background technique [0002] As a new generation of NVM storage medium, PCM (Phase Change Memory) has the characteristics of short read and write delay and long life. However, the delay of PCM write operation is much longer than that of read operation. At the same time, the delay of writing 0 and writing 1 of phase change memory is asymmetrical. The delay of writing 0 is very short, and the delay of writing 1 is very long. The time difference between the two is more than ten times. [0003] The existing technology adopts the method of writing concurrently by batch, and does not distinguish between writing 0 and writing 1. In a batch of data, it is necessary to wait for all 0s and 1s in the batch of data to be written before writing the next batch. The scheme needs to wait for all the bits in the data to be written before writing the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C13/00
Inventor 徐君
Owner HUAWEI TECH CO LTD