Unlock instant, AI-driven research and patent intelligence for your innovation.

Fin spacer protected source and drain regions in FinFETs

A drain region, source technology, applied in the direction of electrical components, electrical solid-state devices, semiconductor devices, etc.

Active Publication Date: 2015-04-29
TAIWAN SEMICON MFG CO LTD
View PDF7 Cites 13 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While existing FinFET devices and methods of fabricating FinFET devices have generally served their intended purpose, they are not entirely satisfactory in all respects

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Fin spacer protected source and drain regions in FinFETs
  • Fin spacer protected source and drain regions in FinFETs
  • Fin spacer protected source and drain regions in FinFETs

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0029] The making and using of embodiments of the invention are discussed in detail below. It should be appreciated, however, that the embodiments provide many applicable concepts that can be implemented in a wide variety of specific contexts. The specific embodiments discussed are illustrative, and do not limit the scope of the invention.

[0030] According to various exemplary embodiments, fin field effect transistors (FinFETs) and methods of forming the same are provided. The intermediate stages of forming the FinFET are shown. Variations of the examples are discussed. The same reference numerals are used to refer to the same elements throughout the various views and exemplary embodiments.

[0031] Figure 1 to Figure 11 are perspective and cross-sectional views of intermediate stages in FinFET fabrication, according to some example embodiments. figure 1A perspective view of the initial structure is shown. The initial structure includes a wafer 100 including a substra...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions include a first portion and a second portion, with the first portion and second portion on opposite sides of the semiconductor fin. The integrated circuit device further includes a gate stack on a top surface and sidewalls of the semiconductor fin, and a semiconductor region connected to an end of the semiconductor fin. The semiconductor region includes a first semiconductor region formed of a first semiconductor material, wherein the first semiconductor region comprise faceted top surfaces, and a second semiconductor region underlying the first semiconductor region. The second semiconductor region has a higher germanium concentration than the first semiconductor region. A fin spacer is on a sidewall of the second semiconductor region, wherein the fin spacer overlaps a portion of the insulation regions.

Description

[0001] Cross References to Related Applications [0002] This patent application is related to U.S. Patent Application No. 13 / 740,373, Attorney Docket No. TSM12-0701, entitled "Semiconductor Device and Fabricating the Same," filed January 14, 2013; 2013 U.S. Patent No. 13 / 902,322, Attorney Docket No. TSM13-0232 / 24061.2471, entitled "Semiconductor Device and Method of Fabricating Same," filed May 24; 2013____ Attorney Docket No. TSM13-1042, U.S. Patent No. 13 / xxx, xxx, filed September 3, 2013, entitled "FinFET Device and Method of Fabricating Same), U.S. Patent Application No. 14 / 017,036, Attorney Docket No. TSM12-0460, the entire contents of which are incorporated herein by reference. technical field [0003] The present invention relates generally to the field of semiconductor technology, and more particularly to fin spacer protected source and drain regions in FinFETs. Background technique [0004] The semiconductor integrated circuit (IC) industry has experienced expone...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L27/088H01L29/78H01L29/06H01L21/8234
CPCH01L21/845H01L29/66795H01L27/0924H01L27/1211H01L21/02236H01L21/02255H01L21/31116H01L27/0886H01L21/823431H01L21/823481H01L21/823821H01L29/66545H01L29/785H01L21/76224H01L29/7848H01L29/165H01L21/0217H01L21/02532H01L21/02576H01L21/30604H01L21/31111H01L21/823437H01L21/823468
Inventor 江国诚徐廷鋐王昭雄刘继文
Owner TAIWAN SEMICON MFG CO LTD