Implementation method of multi-core parallelization of large integer multiplication ssa algorithm based on fft

Abstract

A multi-core parallel implementation method for large integer multiplication SSA algorithm based on FFT. It is a multi-core parallel optimization of large integer multiplication SSA algorithm from a fine-grained perspective. Its core is to use the SSA algorithm to obtain four negative circular convolution The core calculation process is designed in parallel, that is, the four calculation processes of decomposition, FFT forward transformation, point multiplication and FFT inverse transformation are respectively optimized. The invention makes full use of the multi-core resources of the hardware and improves the running speed, which plays a very important role in practical application.

Description

technical field [0001] The invention relates to a multi-core parallel implementation method for a multiplication serial algorithm based on FFT (Fast Fourier Transformation) technology in a GMP (The GNU Multiple Precision Arithmetic Library) library. Background technique [0002] In the field of information security, public key cryptosystems such as RSA and ElGamal are widely used. Modulus reduction, modular multiplication, and modular power are widely used algorithms in public key cryptosystems, and large integer multiplication is the core operation of these algorithms. Higher complexity and more time-consuming. In addition, the multiplication of large integers is also used to accurately calculate certain constants, such as the natural logarithm base e and pi, etc., as well as in the calculation of large-scale prime numbers [1] . [0003] In order to solve the problem of large number calculation, software developers and researchers from all over the world have carried out ...

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Problems solved by technology

In terms of multi-core and even many-core parallelism of large integer multiplication, researchers at home and abroad have done some work, such as literature [9] A CUDA-based large integer multiplication FFT algorithm implementation method is proposed. Compared with the SSA algorithm, the algorithm has a higher time complexity; literature [10] The author carried out parallel optimization on two platforms of multi-core and many-core respectively. Among them, the multi-core scheme related to the parallel scheme of the present invention utilizes large-scale circular convolution, which can be realized by small-scale circular convolution and negative circular convolution based on the Chinese remainder theorem. The angle of solution is optimized, but the acceleration effect is not ideal; literature [11] Based on the divide-and-conquer idea of ​​the karatsuba algorithm, the author optimizes the SSA algorithm in parallel on the GPU platform, but when the scale is greater than 4 million bits, the effect is worse than the serial operation on the 64-bit CPU platform; [12] The author realized the many-core parallelism of the traditional hand multiplication algorithm for large integers on the Intel Xeon Phi platform, but when the size is greater than 2048 bits, the running time of this method is higher than that of the GMP library; [13] The author mainly uses the Chinese remainder theorem (CRT) to achieve multi-core parallelism, but it uses the FFT algorithm with high time complexity

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