Reading method and system, interconnected device controller
A technology of interconnected devices and controllers, applied in the field of reading, can solve problems such as affecting transmission efficiency and large bus delay in reading operations
Inactive Publication Date: 2018-09-21
HUAWEI TECH CO LTD +1
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Therefore, compared with the write operation, the bus delay of the read operation is relatively large, and the read bus transaction cannot be continuously initiated to form a pipeline operation, which affects the transmission efficiency.
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[0055] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is only some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
[0056] See figure 1 , is a schematic diagram of the system architecture provided by the embodiment of the present invention. Such as figure 1As shown, multiple computer systems (such as computer system 1 and computer system 2) are composed of CPU, DRAM (Dynamic Random Access Memory) and RootComplex (root complex), wherein the Root Complex includ...
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The embodiment of the invention discloses a reading method, a reading system and an interconnecting device controller. The method comprises the steps of forming a first write transaction data package including a reading request instruction and memory address information; transmitting the first write transaction data package; receiving a second write transaction data package which comprises data corresponding to the memory address information; resolving the second write transaction data package to obtain data corresponding to the memory address information. According to the reading method provided by the invention, an affair initiator forms the first write transaction data package to replace and transmit the write transaction data package; furthermore, the first write transaction data package comprises a reading request instruction and memory address information, the receiver reads corresponding data according to the reading request instruction and the memory address information, and returns the second write transaction data package, therefore the affair initiator can obtain data to be read to realize read operation, and continuously initiate a read bus affair to improve the transmission efficiency.
Description
technical field [0001] The present invention relates to the technical field of communication, more specifically, to a reading method and system, and an interconnected device controller. Background technique [0002] In computer systems, the speed of read operations (read bus transactions) and write operations (write bus transactions) in some interconnect device controllers (such as PCIe host bridges) is unbalanced. [0003] The write bus transaction belongs to the posted bus transaction. After the transaction initiator sends the write transaction data packet (also called the initiation of the write transaction), it does not need to wait for the response of the receiver. Therefore, the write transaction can be initiated continuously. The read bus transaction is a non-posted bus transaction. After the transaction initiator sends the read request transaction packet (that is, initiates the read bus transaction), it needs to wait for the receiver to return the data to be read bef...
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IPC IPC(8): G06F13/16
Inventor 张立新王聪张柳航董建波
Owner HUAWEI TECH CO LTD