Charge pump device for phase-locked loop clock data restorer

Abstract

The invention relates to a charge pump device for a phase-locked loop clock data restorer. On the basis of a traditional charge pump, the charge pump realizes the current up-down path by adjusting the current relationship between the up-down current source and changing the topological structure of the pull-down current source. It can be multiplexed as a voltage follower function at the same time, eliminating the jitter caused by loop switching and charge sharing on the oscillator control voltage, and does not require an additional voltage follower op amp; the control switches of the charge pump are all of the same type MOS tube implementation eliminates the influence of switch mismatch on the recovery clock phase; at the same time, the charging and discharging current of the charge pump is controlled by the oscillator control voltage, no additional reference source is needed, and the charging and discharging current that changes dynamically with the oscillator frequency makes This charge pump can be used to build an adaptive bandwidth path.

Description

Technical field [0001] The invention relates to a charge pump device, in particular to a charge pump device for a phase-locked loop clock data recovery device. Background technique [0002] Clock data restorer is widely used in the receiving end of high-speed serial data transmission system. It recovers the correct sampling clock from serial data. The application of clock data restorer based on phase locked loop (PLL) The most widespread, this type of clock data restorer is composed of two loops: a frequency synthesis loop, namely a phase-locked loop and a phase tracking loop. The working principle is to first generate an appropriate frequency and then perform phase tracking. For the architecture and application of the clock data recovery device, please refer to the article Architectures For Multi-gigabit Wire-linked Clock and DataRecovery published by Ming-ta Hsieh et al. in the International Institute of Electrical Engineers Journal Circuits and Systems Magazine. [0003] The pr...

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Problems solved by technology

[0009] The system-on-chip will integrate ultra-large-scale digital modules and interface modules. The high-speed switching of the logic gates of the digital modules will introduce large noise on the power supply and ground, and the noise will introduce mismatch current between the charging and discharging current sources of the charge pump. Affecting Phase Tracking of Clock Data Recovery Systems

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