High-precision successive approximation type analog-digital converter and performance lifting method based on DNL (dynamic noise limiter)

一种模数转换器、逐次逼近型的技术,应用在模/数转换、代码转换、仪器等方向,能够解决补偿电容阵列很难实现等问题,达到节省版图面积和功耗、提高测量和校正精度、实现数字校正的效果

Active Publication Date: 2015-07-22
CHONGQING GIGACHIP TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] The traditional capacitor mismatch error correction method usually uses a compensation capacitor array to compensate the capacitor mismatch error. When a certain capacitor participates in the addition and subtraction of charges, the corresponding compensation capacitor array compensates for the charge change caused by the mismatch error. , since the compensation accuracy must be within 1LSB, when the accuracy of the successive approximation A / D converter increases, the compensation capacitor array must adopt a complex structure to achieve high compensation accuracy, so the compensation capacitor array is difficult to achieve

Method used

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  • High-precision successive approximation type analog-digital converter and performance lifting method based on DNL (dynamic noise limiter)
  • High-precision successive approximation type analog-digital converter and performance lifting method based on DNL (dynamic noise limiter)
  • High-precision successive approximation type analog-digital converter and performance lifting method based on DNL (dynamic noise limiter)

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Embodiment Construction

[0082] In order to make the technical means, creative features, goals and effects achieved by the present invention easy to understand, the present invention will be further described below in conjunction with specific illustrations.

[0083] Please refer to figure 1 As shown, the present invention provides a high-precision successive approximation analog-to-digital converter, including a redundant weight capacitor array 11, a comparator 12, a code reconstruction circuit 13, a weight storage circuit 14 and a control logic circuit 15; wherein,

[0084] The redundant weight capacitor array 11 receives external input voltages Vin+ and Vin-, and under the control of the control logic circuit 15, generates output voltages Vout+ and Vout-, which are sent to the comparator 12 for comparison. According to the comparator 12 comparison results, under the control of the control logic circuit 15, sequentially control each capacitor to participate in the voltage addition and subtraction op...

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Abstract

The invention provides a high-precision successive approximation type analog-digital converter and a performance lifting method based on a DNL (dynamic noise limiter). The high-precision successive approximation type analog-digital converter comprises a redundancy weight capacitor array, a comparator, a coding and reconstructing circuit, a weight storage circuit and a control logic circuit, wherein the redundancy weight capacitor array is used for acquiring an input voltage on a sampling stage to generate an output voltage, and realizing voltage addition and subtraction operation by controlling the corresponding weight capacitor of the redundancy weight capacitor array according to the comparator output results on the conversion stage; the comparator is used for comparing the output voltage of the redundancy weight capacitor array; the coding and reconstructing circuit is used for calculating an output code of the successive approximation type analog-digital converter according to the comparator output results and the capacitor weight in the weight storage circuit; the weight storage circuit is used for capacitor weight; the control logic circuit is used for controlling the sampling and conversion stage of the redundancy weight capacitor array. The invention further provides the performance lifting method based on the DNL (dynamic noise limiter). According to the high-precision successive approximation type analog-digital converter provided by the invention, the digital correction of capacitor mismatch errors is realized by adopting the capacitor array with the redundancy weight, and the conversion speed and the linear speed are increased.

Description

technical field [0001] The invention belongs to the technical field of digital-to-analog converters, and in particular relates to a high-precision successive approximation analog-to-digital converter and a performance improvement method based on DNL. Background technique [0002] Successive approximation A / D converters usually include comparators, capacitor arrays, successive approximation registers, and control logic circuits. Most of these circuit modules are digital circuits; therefore, as the process size shrinks, successive approximation A / D converters It began to show its innate structural advantages. With the shrinking of the process size, the digital circuit is not only getting faster and faster, the power consumption is getting lower and lower, but also the area is getting smaller and smaller. This is in line with the low power consumption and small size of modern electronic products. consistent needs. Of course, the analog circuits in it also face the problems of ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/38
CPCH03M1/468H03M1/0678H03M1/1061H03M1/1245H03M1/42H03M1/804
Inventor 李婷胡刚毅蒋和全李儒章黄正波张勇陈光炳王育新付东兵
Owner CHONGQING GIGACHIP TECH CO LTD
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