Integrated circuit, verification method and method for generating eigenvalue adjustment code

Abstract

An integrated circuit comprises a built-in self-testing circuit, a preset characteristic value and a read-only memory. The preset characteristic value is pre-stored in the integrated circuit. At least one piece of effective information and a built-in self-testing characteristic value adjustment code are stored in the read-only memory. The built-in self-testing characteristic value adjustment code is not related with the functional effective information stored by the read-only memory. The built-in self-testing circuit is used for testing content stored in the read-only memory to generate a characteristic value, and the characteristic value is compared with the preset characteristic value so as to judge whether errors exist in the content stored in the read-only memory.

Description

technical field [0001] The invention relates to an integrated circuit, especially an integrated circuit with a built-in self-test circuit and a related verification method. Background technique [0002] Generally, a chip that needs to use a read-only memory (ROM) is usually provided with a built-in self-test (Built-In Self-Test, BIST) circuit, and the built-in self-test circuit can usually use a single input feature buffer (Single Input Signature Register, SISR) algorithm or multiple input signature register (Multiple Input Signature Register, MISR) algorithm, the purpose of the built-in self-test circuit is in product testing or other needs to judge the data in the read-only memory When it is correct, read all the data in the read-only memory and perform calculations to generate a signature pattern, and compare this signature with a predetermined signature pattern to determine the signature pattern stored in the read-only memory. Whether there is an error in the data; wher...

AI Technical Summary

Problems solved by technology

For these electronic products that need to perform a built-in self-test every time they are turned on, when the ROM needs to change the stored program code or other data, it usually causes the built-in self-test circuit to read the ROM. The generated eigenvalues ​​will also change accordingly. Therefore, the predetermined eigenvalues ​​stored in the chip need to be modified accordingly. Therefore, additional mask costs need to be paid, and additional testing of the circuit timing and function after the mask design is changed is also required. Is it correct, increasing design cost

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