Spread spectrum clock generation device and spread spectrum clock signal generation method

Abstract

The invention discloses a spread spectrum clock generation device. The device comprises that a monitoring module is used for monitoring the depth of a first in first out FIFO memory and feeding back the depth of the FIFO memory to a spread spectrum clock generator SSCG; the FIFO memory is used for caching data; the SSCG is used for receiving first clock signals and the depth of the FIFO memory fed back by the monitoring module; the frequency division number of the SSCG is adjusted according to the depth of the FIFO memory, thus obtaining the adjusted frequency division number; carrying out spread spectrum to the first clock signals according to the adjusted frequency division number, thus generating spread spectrum clock signals; through monitoring the depth of the FIFO memory in real time, continuously adjusting the frequency division number of the spread spectrum clock generator SSCG according to the depth of the FIFO memory and generating the spread spectrum clock signals according to the adjusted frequency division number, the center frequencies of the spread spectrum clock signals in different time periods alternately generate high or low conditions; and further the center frequencies of the spread spectrum clock signals in the whole time period is kept stable.

Description

technical field [0001] The invention relates to a spread spectrum clock, in particular to a spread spectrum clock generating device and a method for generating a spread spectrum clock signal. Background technique [0002] In electronic systems, when encountering electromagnetic interference (Electronic Magnetic Interference, EMI) problems, spread spectrum technology can be used to spread the clock signal to obtain a spread spectrum clock signal, and the spread spectrum clock signal can be used as the clock signal source of the electronic system to reduce EMI problems of electronic systems. [0003] figure 1 A schematic diagram of a spread spectrum clock generator (SpreadSpectrumClockGenerator, SSCG) that is provided for the prior art to generate a spread spectrum clock signal, the SSCG spreads the received input clock signal to obtain a spread spectrum clock signal, and the center frequency of the spread spectrum clock signal It is equal to dividing the frequency of the in...

AI Technical Summary

Problems solved by technology

Obviously, due to the discarding of the decimal 0.6 in the rounding process, a quantization error of 0.6 / (2^19) is introduced after 3.7 is converted into a binary number, and the quantization error causes the quantized frequency division number to be less than 3.7

[0007] It can be seen from the above that the existence of the quantization error causes the center frequency of the spread spectrum clock signal output by the SSCG to be in a high or low state all the time, and the ideal center frequency cannot be achieved. As mentioned above, the ideal center frequency means that there is no quantization The center frequency of the spread spectrum clock signal output by the SSCG at the time of error

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