A data processing method and device based on address control

Abstract

The invention provides an address control-based data processing method and device. The method comprises the following steps: after obtaining addresses stored in an address space of a storage device, storing the obtained addresses in a storage device of an intelligent chip; and when the current operation corresponding to data is determined, continuously executing the current operation in a data space on the basis of the addresses, so that the intelligent chip is capable of continuously carrying out data interaction with electronic equipment without waiting for response information fed back by the electronic equipment when interacting data with the electronic equipment, and then the data transmission efficiency is improved. Due to the improvement of the data transmission efficiency, the amount of the data transmitted in a certain time is improved, and the time of waiting for the response information fed back by the electronic equipment is used for carrying out data interaction, so that the effective bandwidth of the transmission is improved, the amount of the data transmitted in the certain time is increased and then the data loss probability is reduced.

Description

technical field [0001] The invention belongs to the technical field of data storage operations, and in particular relates to a data processing method and device based on address control. Background technique [0002] At present, smart chips, such as FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) can pass PCI (Peripheral Component Interconnect, peripheral component interconnection standard) bus interface or PCIE (Peripheral Component Interface Express, bus and interface standard) bus The interface communicates with the electronic device, and a large amount of data can be transmitted to the electronic device through the PCI bus interface or the PCIE bus interface. [0003] When transmitting a large amount of data, the electronic device can read the data stored in the register of the smart chip through the PCI bus interface or the PCIE bus interface, and when reading the data stored in the register, only one register can be read at a time After reading, th...

AI Technical Summary

Problems solved by technology

After the smart chip receives the response information, the electronic device can read the data stored in other registers again, resulting in a decrease in data transmission efficiency within a certain period of time, and the amount of data transmitted within a certain period of time is limited, which makes the register operation effective. Bandwidth reduction, where effective bandwidth refers to the number of valid bytes transmitted within a certain period of time

[0004] In the case of reduced effective bandwidth, if the amount of transmitted data exceeds the effective bandwidth, data loss will result. For example, when an electronic device reads data, it can read 1000 bytes of data in 1 second, then the effective bandwidth is 1000Byte / s , if the data that needs to be uploaded now is 1500Byte / s, then there will be 500Byte data that cannot be read, and when there are 1500Byte uploaded in the next second, there will still be 500Byte that cannot be uploaded. If this continues, there will be a large amount of data that cannot be uploaded. Uploaded data lost

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