A conversion method between def library and 3D integrated circuit bookshelf library

Abstract

The invention discloses a method for converting a Def library and a 3D integrated circuit bookshelf library. The method comprises the following steps: performing partitioned processing on a circuit layout, and then enabling the circuit layout to perform memory stacking operation as a single-layer circuit; classifying cross layers and communicated-layer nets by use of a net extraction and expansion module, performing insert variable treatment, and generating a .nets file; extracting all unit coordinate information in a standard unit coordinate file .place by use of a standard unit coordinate extraction module, and generating a .pl file; extracting all unit names, size information, port information and standard unit names subjected to .v universal instantiation in a .lef file by use of a standard unit size extraction unit, and generating a .nodes file; and converting a net of circuit layout cross layers into TSV by use of a TSV insert module, and inserting the TSV into the circuit layout. According to the method, the single-layer integrated circuit Def library is converted into the 3D integrated circuit bookshelf library, so that a developer can perform 3D integrated circuit test and development under a condition of having a single-layer EDA tool.

Description

technical field [0001] The present invention generally relates to the design and manufacture of 3D integrated circuits. More specifically, the present invention relates to the research on benchmark test circuits for layout and wiring of 3D integrated circuits, which belongs to the field of circuit design. Background technique [0002] With the rapid development of the integrated circuit industry today, with the increasing scale of traditional 2D digital integrated circuits, especially the emergence of VLSI, SOC and 3D integrated circuits, the functions of integrated circuits are becoming more and more powerful, and the complexity of their internal structures is also increasing. A single chip can already integrate hundreds of millions of transistors. More specifically, as described by Moore's Law, today's technological level has reached the nanoscale. Therefore, 3D integrated circuit (Three-Dimensional IC) has become one of the most promising technologies to improve circuit ...

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Problems solved by technology

[0004] However, the current EDA tools for 3D integrated circuits are not yet mature enough, and even Benchmarks that have not yet formed can provide layout and wiring of 3D integrated circuits and some functional tests, which have caused certain obstacles to the development of 3D integrated circuits. A set of Benchmarks has become the key to promote the development of 3D integrated circuit technology

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