A multi-objective high-speed debug circuit

Abstract

The invention provides a multi-target high-speed debug circuit which comprises a multi-core CPU system, a time information unit, a time information control unit, a debug information acquisition unit, an ATB protocol conversion unit, an ATB mixing unit, an interface control unit, a configuration bus and a protocol analysis unit.The time information unit carries time information for each CPU and each cache circuit of the multi-core CPU system, and debug information is derived to observable IO of a chip through the debug information acquisition unit, the ATB protocol conversion unit, the ATB protocol conversion unit, the ATB mixing unit and the interface control unit in sequence.The protocol analysis unit controls all the modules through the configuration bus.Information interaction output between the multi-core CPUs arranged in an interaction mode in the multi-core CPU system can be achieved; meanwhile, besides an instruction pointer, processed output and CPU states can be printed in real time, and the requirements for the current high-performance soc chips developing at a high speed can be completely met.

Description

Technical field [0001] The invention relates to a SOC chip, in particular to a high-speed debug circuit of the SOC chip. Background technique [0002] With the rapid development of SOC chip technology, CPUs are running faster and faster, and higher requirements are put forward for chip debugging. [0003] In traditional design, because the overall chip is relatively simple and debugging only needs to set breakpoints and print the debug pointer information, but as the design of the chip becomes more complex, the performance and operating speed are getting higher and higher, the traditional debug design method It has been unable to meet the needs of high-performance SOC chips, the speed is too slow, and the printed information is too little, so further improvements are needed. Summary of the invention [0004] The technical problem to be solved by the present invention is to provide a multi-target high-speed debug circuit, which can realize the interactive setting between multi-core ...

AI Technical Summary

Problems solved by technology

[0003] In the traditional design, because the overall chip is relatively simple and debugging only needs to set breakpoints and print debug pointer information, but as the design of the chip becomes more complex, the performance and running speed are getting higher and higher, the traditional debug design method It can no longer meet the needs of high-performance soc chips, the speed is too slow, and the printed information is too little, so further improvement is needed

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