Distributed signal topological relation construction method used for analyzing single-particle and soft-error fault propagation

Abstract

The invention relates to a distributed signal topological relation construction method used for analyzing single-particle and soft-error fault propagation and belongs to the technical field of evaluation of single-particle and soft-error reliability in a system. The method comprises the following steps: based on circuit nodes and corresponding inter-signal cascaded information under hardware resource construction in XDL (Xilinx Design Language) net list information, providing a cascaded forward search analysis method of signal cascaded information between the circuit nodes, constructing a directed propagation topological relation between the circuit nodes in the system and finishing circuit signal propagation relation analysis between hardware resources with different types; meanwhile, correlating circuit connection reflected according to an XDL net list and control configuration bit information. According to the method provided by the invention, a configuration information matching rule is provided, and an internal signal propagation path under resource mapping of the circuit nodes is analyzed and constructed; the circuit signal propagation relation analysis under the hardware resources with the specific type is finished.

Description

technical field [0001] The invention relates to a method for constructing a distributed signal topological relationship for single-event soft error fault propagation analysis, and belongs to the technical field of system single-event soft error reliability evaluation. Background technique [0002] At present, in the stand-alone system of electronic equipment for aerospace applications, the digital signal processing stand-alone system built with Xilinx SRAM FPGA as the core device is widely used. However, the single event effect will affect the configuration storage bits of the SRAM FPGA, which may cause errors in the connection relationship of the circuit signals in the resources of the FPGA and affect the function of the circuit system. Therefore, the single-event soft-error reliable design evaluation research is carried out based on this kind of programmable logic device stand-alone system, which will involve the construction of the propagation model of the circuit signal,...

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Problems solved by technology

[0003] At present, the method research on the construction of signal topological relationship is based on the analysis method of RTL-level netlist, and the analysis results can only provide the timing signal topology relationship of the basic unit logic layer, and cannot effectively characterize the impact of single event effects on programmable logic circuits. Influence and Dissemination Process

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