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A Distributed Signal Topological Relationship Construction Method for Single Event Soft Error Fault Propagation Analysis

A technology of topology relationship and fault propagation, applied in special data processing applications, instruments, calculations, etc., can solve problems such as the inability to effectively characterize the influence of single event effects on programmable logic circuits and the propagation process.

Active Publication Date: 2019-09-06
XIAN INSTITUE OF SPACE RADIO TECH
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Problems solved by technology

[0003] At present, the method research on the construction of signal topological relationship is based on the analysis method of RTL-level netlist, and the analysis results can only provide the timing signal topology relationship of the basic unit logic layer, and cannot effectively characterize the impact of single event effects on programmable logic circuits. Influence and Dissemination Process

Method used

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  • A Distributed Signal Topological Relationship Construction Method for Single Event Soft Error Fault Propagation Analysis
  • A Distributed Signal Topological Relationship Construction Method for Single Event Soft Error Fault Propagation Analysis
  • A Distributed Signal Topological Relationship Construction Method for Single Event Soft Error Fault Propagation Analysis

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Embodiment

[0063] The architecture of the whole method consists of figure 1 As shown, it is mainly divided into three stages, namely:

[0064] (1) The first stage: design preparation

[0065] According to the user's design requirements for the application range of the signal propagation topology relationship, the VHDL engineering design file can be divided according to the top-level function module of the system and the vhd function module of other levels, so as to complete the extraction of the input and output port signals of the function module, and generate each function module XDL netlist file after synthesis mapping.

[0066] Step 1: Describe the code segment of the function module, and the function module is as follows figure 2 consists of three structural parts.

[0067] Step 2: Import the VHDL engineering design file, and obtain the top-level and other levels of functional modules and corresponding code segments according to the hierarchical division relationship of the proj...

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Abstract

The invention relates to a distributed signal topological relation construction method used for analyzing single-particle and soft-error fault propagation and belongs to the technical field of evaluation of single-particle and soft-error reliability in a system. The method comprises the following steps: based on circuit nodes and corresponding inter-signal cascaded information under hardware resource construction in XDL (Xilinx Design Language) net list information, providing a cascaded forward search analysis method of signal cascaded information between the circuit nodes, constructing a directed propagation topological relation between the circuit nodes in the system and finishing circuit signal propagation relation analysis between hardware resources with different types; meanwhile, correlating circuit connection reflected according to an XDL net list and control configuration bit information. According to the method provided by the invention, a configuration information matching rule is provided, and an internal signal propagation path under resource mapping of the circuit nodes is analyzed and constructed; the circuit signal propagation relation analysis under the hardware resources with the specific type is finished.

Description

technical field [0001] The invention relates to a method for constructing a distributed signal topological relationship for single-event soft error fault propagation analysis, and belongs to the technical field of system single-event soft error reliability evaluation. Background technique [0002] At present, in the stand-alone system of electronic equipment for aerospace applications, the digital signal processing stand-alone system built with Xilinx SRAM FPGA as the core device is widely used. However, the single event effect will affect the configuration storage bits of the SRAM FPGA, which may cause errors in the connection relationship of the circuit signals in the resources of the FPGA and affect the function of the circuit system. Therefore, the single-event soft-error reliable design evaluation research is carried out based on this kind of programmable logic device stand-alone system, which will involve the construction of the propagation model of the circuit signal,...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
CPCG06F30/327
Inventor 高翔周国昌赖晓玲朱启杨玉辰
Owner XIAN INSTITUE OF SPACE RADIO TECH
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