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Electronic package and its manufacturing method

A technology for electronic packaging and electronic components, which is applied in the manufacturing of electrical components, electric solid-state devices, and semiconductor/solid-state devices, etc., can solve the problems of long conductive paths and inability to meet requirements, and achieve the effect of shortening the conductive paths.

Active Publication Date: 2017-03-01
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in the existing semiconductor package 1, the wiring is done through the limited space of the substrate 10, so only simple circuit conduction can be done, and the electrical connection between the chips 11, 12 needs to be connected with the bonding wires 110, 120. Substrate 10, resulting in too long conductive path, thus unable to meet the requirements

Method used

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  • Electronic package and its manufacturing method
  • Electronic package and its manufacturing method
  • Electronic package and its manufacturing method

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Embodiment Construction

[0052] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0053] It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered. At the same time, terms such as "above", "first", "second" and ...

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Abstract

The invention discloses an electronic package and its manufacturing method. The electronic package comprises a first package layer, a first electronic component embedded in the first package layer, a first line structure formed on the first package layer, a second electronic component provided on the first line structure, a second package layer covering the second electronic component, and a second line structure formed on the second package layer, so that through the stack design of the first and second line structures, the line can be arranged as required and will not limited by space.

Description

technical field [0001] The invention relates to an electronic package, in particular to an electronic package with lightness, thinness and miniaturization and its manufacturing method. Background technique [0002] With the vigorous development of the electronic industry, electronic products are gradually moving towards the trend of multi-function and high performance. Due to the popularization of the Internet of Things and the increasing demand for mobile communication semiconductors, and the chips need to communicate with each other, the micro-package structure that can accommodate multiple chips and complex stacking is becoming more and more important. [0003] figure 1 It is a schematic cross-sectional view of a conventional semiconductor package 1 . Such as figure 1 As shown, the existing semiconductor package 1 stacks a plurality of chips 11, 12 on a substrate 10, and these chips 11, 12 are electrically connected to the substrate 10 with a plurality of bonding wires...

Claims

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Application Information

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IPC IPC(8): H01L23/498H01L21/48
CPCH01L2224/19H01L2924/181H01L24/96H01L2224/04105H01L2224/12105H01L2224/24137H01L2224/32145H01L2224/32225H01L2224/48091H01L2224/73265H01L2224/73267H01L2224/92244H01L2924/00012H01L2924/00014H01L2224/83005
Inventor 张宏达姜亦震
Owner SILICONWARE PRECISION IND CO LTD
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