Shifting register unit, drive method thereof, gate drive circuit and display panel
A shift register and driving signal technology, applied in static memory, digital memory information, instruments, etc., can solve problems such as increased process difficulty, uncompetitive display panels, and increased production costs
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Embodiment 1
[0098] by Figure 2a The structure of the shift register unit shown is taken as an example to describe its working process, wherein, in Figure 2a In the shift register unit shown, all switching transistors are N-type switching transistors; the potential of the first reference signal terminal VSS is low potential, and the potential of the second reference signal terminal VDD is high potential; the corresponding input and output timing diagram is as follows Figure 3a Shown, specifically, select as Figure 3a The four stages of T1, T2, T3 and T4 in the shown input and output timing diagram.
[0099] In the T1 stage, Input=1, Reset=0, CLK=0.
[0100] Since Input=1, the fourth switching transistor M4 is turned on. Since the fourth switch transistor M4 is turned on and provides the signal of the high-potential input signal terminal Input to the first node A, the potential of the first node A is high. Since the potential of the first node A is high, both the third switching tra...
Embodiment 2
[0114] by Figure 2b The structure of the shift register unit shown is taken as an example to describe its working process, wherein, in Figure 2b In the shift register unit shown, all switching transistors are P-type switching transistors; the potential of the first reference signal terminal VSS is high potential, and the potential of the second reference signal terminal VDD is low potential; the corresponding input and output timing diagram is as follows Figure 3b Shown, specifically, select as Figure 3b The four stages of T1, T2, T3 and T4 in the shown input and output timing diagram.
[0115] In the T1 stage, Input=0, Reset=1, CLK=1.
[0116] Since Input=0, the fourth switching transistor M4 is turned on. Since the fourth switch transistor M4 is turned on and provides the signal of the input signal terminal Input with a high potential to the first node A, the potential of the first node A is low. Since the potential of the first node A is low, both the third switch t...
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