Semiconductor device and manufacturing method thereof and electronic device
A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as chip damage, and achieve the effect of reducing stress and increasing bump density
Active Publication Date: 2017-07-21
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
[0005] Aiming at the deficiencies of the prior art, the present invention proposes a semiconductor device and its manufacturing method and electronic device, which can prevent the problem of chip damage caused by deformation stress in the chip packaging quality test
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[0035] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.
[0036] It should be understood that the invention can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.
[0037] It will be understood that when an element or layer is referred t...
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The invention provides a semiconductor device and a manufacturing method thereof and an electronic device, and relates to the technical field of semiconductors. The method includes the following steps: providing a semiconductor wafer, forming bumps on the semiconductor wafer which are used for being connected with a packaging substrate, and forming dummy bump arrays surrounding isolated bumps around the isolated bumps among the bumps. According to the manufacturing method of the semiconductor device, a plurality of dummy bumps are formed around the isolated bumps, so as to surround the isolated bumps, since the isolated bumps are surrounded by the surrounding dummy bumps, the bump density of an isolated bump area is improved, when external stress exists, the stress of the isolated bumps in the area with low bump density is shared by the surrounding dummy bumps and is reduced, and thus the problems of passivation layer damage and the like are not easy to occur in a packaging chip quality test. The electronic device includes the abovementioned semiconductor device and also has the abovementioned advantage.
Description
technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] In the package interconnection of integrated circuits, the connection of semiconductor devices (eg, chips) and package substrates (eg, leadframes) provides circuit connections for distribution of power and signals. Common connection methods for electronic packaging include wire bonding (Wire Bonding, WB), tape carrier automatic welding (TAPE Automated Bonding TAB) and flip chip (Flip chip, FC). The flip-chip bump structure has become a commonly used packaging technology due to its high mounting density of semiconductor devices. Such as figure 1 As shown, in the flip-chip bump structure, a bump 101, such as a copper pillar, is formed on the chip 100, and the connection between the chip 100 and the substrate 102 can be realized by connecting the bump to a...
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IPC IPC(8): H01L21/60H01L23/482
CPCH01L24/11H01L24/14H01L2224/11019H01L2224/1412H01L2224/16225H01L2924/15311H01L2924/3511
Inventor 殷原梓
Owner SEMICON MFG INT (SHANGHAI) CORP