A bias current and power-on reset circuit for a shutdown chip

Abstract

The invention provides bias current and a power-on reset circuit for shutdown chips and belongs to the technical field of analogue integrated circuits. The bias current and the power-on reset circuit for shutdown chips comprise interconnected power-on reset circuit and current biasing circuit; wherein the current biasing circuit comprises interconnected start-up circuit and bias current generation circuit. When a power-on reset circuit is being powered on, ensuring that the logic of the shutdown signal is non-stop logic until, during this process, the bias current generation circuit is charged by the start-up circuit until the shutdown chip is free of degeneracy bias points. The power-on reset circuit is also used for generating power-on reset signals after the completion of power-on, monitoring external shutdown signals and making the bias current generate a circuit into a high impedance state when the logic of the external shutdown signal is the shutdown logic, then the shutdown chip enters shutdown state. The invention can ensure the normal start-up and shutdown of chips, greatly increasing the reliability of shutdown and start-up of chips.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuits, and relates to a circuit, especially a bias current and power-on reset circuit. Background technique [0002] Bias circuit and power-on reset circuit are indispensable components in modern chips, which respectively provide voltage / current bias and reset logic for other circuits in the chip to avoid unstable logic states. [0003] Today, low-power design is an important norm in the field of integrated circuit design. For common long-time continuous working circuits such as bias circuits and power-on reset circuits, the demand for low power consumption requires them to have shutdown and restart functions. Usually, the shutdown of the circuit is controlled by the shutdown signal, but during the power-on process, before the power-on reset circuit sends the power-on reset signal, the logic in the chip (including the shutdown signal) is in a logic unstable state. Since the shutdown...

AI Technical Summary

Problems solved by technology

Since the shutdown signal controls the shutdown of the bias circuit and the power-on reset circuit at the same time, it may cause the shutdown signal to be in an effective shutdown state (usually logic 1) before the power-on reset circuit generates a reset signal, thereby biasing the circuit and The power-on reset circuit cannot work normally, and the entire chip cannot be powered on and enters the normal working mode

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