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A device for adding vibration to the falling edge of sequence pulse

A technology of sequence pulse and generating device, which is applied in the direction of pulse technology, pulse processing, pulse shaping, etc., to achieve the effect of good scalability and flexibility

Active Publication Date: 2019-07-12
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, there is no technology in the domestic public information to add jitter to the sequence pulse signal to test the equipment under test.

Method used

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  • A device for adding vibration to the falling edge of sequence pulse
  • A device for adding vibration to the falling edge of sequence pulse
  • A device for adding vibration to the falling edge of sequence pulse

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0032] figure 1 It is a functional block diagram of a device for adding vibration at the falling edge of a sequence pulse in the present invention.

[0033] In this example, if figure 1 As shown, a device for shaking the falling edge of a sequence pulse in the present invention includes: a data signal generating device, a fan-out circuit, a sharpening circuit 1 and a sharpening circuit 2, a fixed delay circuit 1 and a fixed delay circuit 2, an address controller, Phase shifting circuit, jitter data storage circuit, delay circuit and signal edge synthesis circuit;

[0034] A data signal generating device for generating sequence pulses that need to be dithered and sending them to the fan-out circuit;

[0035] The fan-out circuit is used to fan the sequence pulse into a rising edge signal and a falling edge signal, and then send them to different sharpening circuits respectively;

[0036] The sharpening circuit 1 and the sharpening circuit 2, the sharpening circuit 1 is used t...

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PUM

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Abstract

The invention discloses a device for adding jitter to the falling edge of a sequence pulse. For the sequence pulse waveform that needs to be loaded with jitter, it is decomposed into a rising edge signal and a falling edge signal, and the jitter is converted into a delay timing control load to the falling edge, and the rising edge signal is used as a trigger. The clock and the falling edge signal of the device are used as the reset signal to make the sequence pulse signal pull high when the rising edge arrives, and pull low when the falling edge arrives, so as to realize the waveform synthesis of the falling edge of the part of the sequence pulse signal with shaking; wherein, the falling edge is at The time delay under the action of the programmable delay line, because the value of the time delay is programmable, so the moment when the falling edge arrives changes with the control data, and the falling edge of the sequence pulse signal synthesized by the rising edge and the falling edge generates a period Therefore, the falling edge can be loaded with programmable jitter, which has very good scalability and flexibility.

Description

technical field [0001] The invention belongs to the technical field of digital testing, and more specifically relates to a device for adding vibration to the falling edge of sequence pulses. Background technique [0002] In recent years, under the background of the rapid development of electronic technology, digital equipment has also been continuously developed, and it has shown its uniqueness and shortage in the fields of communication and navigation. Judging from the current situation, the development of digital equipment is accompanied by the development of semiconductor devices, evolving towards integration and intelligence, and presents high precision, high integration, multi-functionality, human-computer interaction, and programmability. characteristics of development. At the same time, the development of semiconductor technology and integration technology has also promoted the innovation of digital technology, and the development of digital technology largely reflec...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/06H03K5/133
CPCH03K5/06H03K5/133
Inventor 付在明刘航麟黄建国赵贻玖
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA