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Method and device for merging table entries in directory

A table entry and directory technology, applied in the computer field, can solve the problems of setting a table entry in the cache block, reducing the hit rate of the cache block, and limited area overhead.

Active Publication Date: 2020-07-28
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the limited power consumption and area overhead of the directory cache, the number of stored entries is also limited, and it is generally impossible to set an entry for each cache block. When the storage of entries in the directory cache reaches the upper limit, it will The contention of the entry is caused, and the entry needs to be replaced, and each copy of the cache block recorded by the replaced entry needs to be invalidated, causing additional communication overhead for the entire cache system. The invalidation of the cache block will also reduce the hit rate of the cache block

Method used

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  • Method and device for merging table entries in directory
  • Method and device for merging table entries in directory
  • Method and device for merging table entries in directory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0055] Embodiment 1 provides a directory for use in the aforementioned shared cache architecture, such as figure 2 The catalog 100 shown includes:

[0056] Block entry 102, including entry label 1022, sharer number 1024;

[0057] Region entry 104, including entry label 1042, sharer number 1044;

[0058] A super-area entry 106, including an entry label 1062, and a sharer number 1064;

[0059] Entry tag 1022 indicates a cache block, and entry tag 1042 indicates 2 n cache blocks, entry tag 1062 indicates 2 n +m cache blocks, n and m are both positive integers. That is, the number of cache blocks managed by the super-region entry 106 can be 2 of the region entry 104 m In practice, the super-area entry 106 may include multiple super-area entries, for example, including the entry label indication 2 n+1 The super-region entry of cache blocks, the entry label indicates 2 n+2 The super-region entry of cache blocks, the entry label indicates 2 n+3 cache block super-region entr...

Embodiment 2

[0092] Embodiment 2 of this device provides a device 400 for merging entries in the directory for cache consistency. The device 400 is specifically used for merging entries in the directory of any option in Embodiment 1. The composition of the device 400 Schematic such as Figure 5 shown, including:

[0093] A confirmation module 402, configured to determine the N entries to be merged, wherein the cache block indicated by the entry label of each of the N entries belongs to the merge range, and the merge range indicates 2 a cache blocks, the N and the a are both positive integers.

[0094] A processing module 404, configured to merge the N entries into a first entry, where the entry label of the first entry indicates the 2 a cache blocks, the sharer number of the first entry is the sharer number of the N entries.

[0095] The confirming module 402 specifically executes step 202 of the first method embodiment and various optional solutions of step 202 .

[0096] The processi...

Embodiment 3

[0114] Embodiment 3 of this device provides a device 800 for accessing a directory. The directory includes multiple entries, each entry includes an entry tag and a sharer number, and the entry tag is used to indicate a cache block. The plurality of entries includes a first entry, and the entry label of the first entry indicates 2 a cache blocks, the a is a positive integer, and the schematic diagram of the composition structure of the device 800 is as follows Figure 7 shown, including:

[0115] The receiving module 802 is configured to receive a directory access request, where the directory access request carries the tag of the cache block to be accessed.

[0116] The processing module 804 is configured to query the directory according to the tag of the cache block to be accessed, and obtain a set of entries corresponding to the cache block to be accessed, the set of entries includes entries in the directory The label indicates all entries of the cache block to be accessed;...

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Abstract

The embodiment of the present invention discloses a method for merging entries, which includes determining N entries to be merged, the cache block indicated by the entry label of each of the N entries belongs to the merging range, and the merging range indicates 2 a cache blocks; merge N entries into the first entry, where the entry label of the first entry indicates 2 a cache blocks, the sharer number of the first entry includes the sharer number of each of the N entries, and this method can effectively merge the entries in the directory to improve the use efficiency of the directory.

Description

technical field [0001] The invention relates to the field of computers, in particular to a method and device for merging entries in a directory, and a method and device for accessing a directory. Background technique [0002] In a multi-core processor, generally each processor core has a private cache, and each private cache can only be accessed by the processor core where it is located. At the same time, a shared cache is also set on the multi-core processor. The shared cache can be Accessed by each processor core. After each processor core reads a cache block from the shared cache, it can create a copy of the cache block in its private cache and read and write to it. Therefore, a certain cache block stored in the shared cache may be stored in multiple Multiple copies are created in private caches. When the copy of the cache block in any private cache is modified, other private caches need to be notified to invalidate other copies of the cache block, so as to achieve cons...

Claims

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Application Information

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IPC IPC(8): G06F12/0817
CPCG06F12/082G06F12/121G06F2212/1021G06F2212/1044G06F12/084G06F12/0808G06F12/0817G06F2212/62
Inventor 方磊顾雄礼蔡卫光
Owner HUAWEI TECH CO LTD
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