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Circuits, systems and methods for error correction code management of write-once memory codes

一种存储器、纠错码的技术，应用在一次写入型存储器码的纠错码管理的电路、系统和方法领域，能够解决降低性能特性、增加花费等问题

Active Publication Date: 2021-06-18
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, some memory device solutions such as Electrically Erasable Read-Only Memory are not suitable for certain applications due to increased cost and degraded performance characteristics

Method used

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  • Circuits, systems and methods for error correction code management of write-once memory codes
  • Circuits, systems and methods for error correction code management of write-once memory codes
  • Circuits, systems and methods for error correction code management of write-once memory codes

Examples

Experimental program
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Embodiment Construction

[0010] The various names may refer to components or systems. A system may be a subsystem of another system. If a first device couples to a second device, that connection may be through a direct electrical connection or through an indirect electrical connection via other devices and connections.

[0011] figure 1 An illustrative computing system 100 is shown in accordance with an example embodiment. For example, computing system 100 is or is incorporated into electronic system 129, such as a computer, an electronic control "box" or display, a communication device (including a transmitter), or any other type of electronic system arranged to generate radio frequency signals.

[0012] In some embodiments, computing system 100 includes a megacell or system on a chip (SoC) that includes control logic such as CPU 112 (central processing unit), storage 114 such as random access memory (RAM), and power supply 110. For example, the CPU 112 may be a CISC type (Complex Instruction Set ...

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PUM

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Abstract

In the described example, a system for error correcting code (ECC) management of write-once memory (WOM) codes includes a host processor arranged to send data words to be stored to a WOM ( write-once memory) devices. The host interface is arranged to receive (710) the first data word for processing by the WOM controller and the ECC controller. The WOM controller is operable to generate (720) a first WOM-encoded word in response to the original symbols of the first data word, and the ECC controller is operable to generate (730) a first set of ECC bits in response to the original symbols of the first data word. The memory device interface is configured to write (740) the first WOM-encoded word and the first set of ECC bits to the WOM device based on the memory address associated with the first data word.

Description

Background technique [0001] The computer system includes a processor operable to retrieve, process and store data in memory devices. Memory devices for computer systems include different types of memory devices, where different types of memory devices typically have different performance and operating characteristics. The type of memory device used in a particular system is generally selected according to the requirements of the particular application of the computer system. For example, some system designs require the ability to write data to and read data from nonvolatile memory locations. However, some memory device solutions, such as electrically erasable read-only memory, are not suitable for certain applications due to increased cost and reduced performance characteristics. Contents of the invention [0002] The problems noted above can be solved in a system for error correcting code (ECC) management of write-once memory (WOM) codes comprising, for example, a host pr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/08G11C29/52H03M13/00
CPCG06F11/1044G11C16/10G11C29/42G06F11/1048G06F3/0619G06F3/064G06F3/0673G06F11/08G06F11/1004G06F11/1016G06F11/1072G06F11/1076G06F12/0246G11C29/52H03M13/13
Inventor S·张Y·朱C·彼特斯通S·拉马斯瓦米
Owner TEXAS INSTR INC