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SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) time sequence reading circuit

A sequential circuit and capacitor technology, applied in the semiconductor field, can solve the problems of SONOScell ​​reading "0" deterioration, unfavorable reading "0", longer Tpc time, etc., to achieve stable and effective reading effect

Active Publication Date: 2018-03-13
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] SONOS cell itself will read "0" worse as the temperature decreases
[0012] In general, in the existing circuit timing, the above four timings will be larger as the temperature decreases. Since the cell itself is weak to read "0" at low temperature, the longer Tpc time is not conducive to reading "0". "

Method used

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  • SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) time sequence reading circuit
  • SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) time sequence reading circuit
  • SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) time sequence reading circuit

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Embodiment Construction

[0032] Since the existing SONOS read timing circuit is weak in reading "0" at low temperature, the longer Tpc time is not conducive to reading "0". Therefore, the present invention proposes to use the temperature compensation method to re-read "0" when the Taa time is fixed. Assign Tpc and Tsa at low temperature, and design Tpc to decrease as the temperature decreases, while Tsa increases as the temperature increases.

[0033] Based on the above technical ideas, the SONOS read sequence circuit of the present invention includes:

[0034] first and second PMOS transistors, first and second NMOS transistors, and a capacitor;

[0035] Wherein the first PMOS is connected in series with the first NMOS, and the second PMOS is connected in series with the second NMOS;

[0036] The sources of the first PMOS and the second PMOS are connected to a power supply;

[0037] The gates of the first PMOS and the first NMOS are connected in parallel and then connected to the input, and the ser...

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PUM

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Abstract

The invention discloses an SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) time sequence reading circuit, which comprises first and second PMOS (P-channel Metal Oxide Semiconductor) tubes, first and second NMOS (N-channel metal oxide semiconductor) tubes and a first capacitor, wherein the first PMOS tube and the first NMOS tube are connected in series; the second PMOS tube and the second NMOS tube areconnected in series; the source electrode of the first PMOS tube and the source electrode of second PMOS tube are connected with a power supply; the grid electrode of the first PMOS tube and the gridelectrode of the first NMOS tube are connected in parallel and are then connected with input; the series connection joint of the first PMOS tube and the first NMOS tube is connected with the grid electrode of the second PMOS tube and the second NMOS tube; the series connection joint of the second PMOS tube and the second NMOS tube is an output port; the source electrode of the second NMOS tube isgrounded; one end of the capacitor is grounded; the other end of the capacitor is connected with the grid electrode of the second PMOS tube and the second NMOS tube; the source electrode of the firstNMOS tube is grounded through a by-pass current source. The by-pass current source with the positive and negative temperature coefficients is used; the precharging time of a selected read unit and the time sequence for generating sensitive amplifier comparison data 0 or 1 are reallocated; the time sequence reading circuit is enabled to stably and effectively read data at low temperature.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a SONOS read sequence circuit of a nonvolatile memory. Background technique [0002] NVM (Non-volatile Memory), non-volatile memory, has the characteristics of non-volatile, byte-based access, high storage density, low energy consumption, and read and write performance close to DRAM. Electronic devices can quickly access the contents of this memory storage space (in most cases such devices access these contents in bytes and save them after power loss). It does not periodically refresh memory contents. This includes all forms of read-only memory (ROM), such as programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable read-only memory (EEPROM), and flash memory. It also includes battery-backed random access memory (RAM). [0003] SONOS (Silicon-Oxide-Nitride-Oxide-Silicon, silicon-oxide-nitride-silicon oxide-silicon, also known as s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/10G11C7/22
CPCG11C7/1063G11C7/222
Inventor 刘芳芳
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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