Sonos read timing circuit
A technology of sequential circuits and capacitors, applied in the semiconductor field, can solve the problems of SONOScell reading "0" becoming worse, unfavorable reading "0", and Tpc time becoming longer, etc., to achieve stable and effective reading.
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[0032] Since the existing SONOS read timing circuit is weak in reading "0" at low temperature, the longer Tpc time is not conducive to reading "0". Therefore, the present invention proposes to use the temperature compensation method to re-read "0" when the Taa time is fixed. Assign Tpc and Tsa at low temperature, and design Tpc to decrease as the temperature decreases, while Tsa increases as the temperature increases.
[0033] Based on the above technical ideas, the SONOS read sequence circuit of the present invention includes:
[0034] first and second PMOS transistors, first and second NMOS transistors, and a capacitor;
[0035] Wherein the first PMOS is connected in series with the first NMOS, and the second PMOS is connected in series with the second NMOS;
[0036] The sources of the first PMOS and the second PMOS are connected to a power supply;
[0037] The gates of the first PMOS and the first NMOS are connected in parallel and then connected to the input, and the ser...
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