Flash bad block emulation verification system based on storage control fpga

Abstract

The invention provides a storage control FPGA-based FLASH bad block simulation verification system. The system comprises a simulated EEPROM module, a simulated analog quantity telemetry receiving module, a simulated serial port telemetry receiving module, a simulated storage board module, a simulated clock, a reset module, a block protection module, a simulated auxiliary control board module and asimulated remote control instruction sending module. The system is suitable for ground simulation verification of a storage control FPGA in a satellite product. Bad blocks can be generated in any position by changing a code analog storage board (based on a FLASH) of a simulation system; and the correctness of the storage control FPGA under various working conditions can be verified. Meanwhile, aworking process of a bad block table also can be recorded; various remote control instructions can be input to the storage control FPGA in a simulated manner; telemetry information is received and stored; and a closed-loop simulation environment is provided for the storage control FPGA. The system can be expanded and applied to storage control FPGA ground simulation verification of multiple typesof satellite products.

Description

technical field [0001] The invention relates to solid-state memory in satellite products, in particular to ground simulation of a solid-state memory comprehensive processor system, which is mainly used in the technical field of large-capacity solid memory design, and in particular to a FLASH bad block simulation verification system based on storage control FPGA. Background technique [0002] Solid-state memory (solid storage) based on FLASH is widely used in satellite engineering as a storage device. The advantages of FLASH are low power consumption, low cost, and no loss of data when power is turned off. The disadvantage is that it is limited by the chip process and cannot guarantee reliable performance within its life cycle. For this reason, it is necessary to design storage control FPGA to manage bad blocks of FLASH in satellite products. However, due to the randomness of the effective storage unit FLASH bad blocks in the storage board, it is difficult to accurately set ...

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Problems solved by technology

[0004] The purpose of the present invention is to provide a FLASH bad block simulation verification system based on storage control FPGA, to solve the establishment and maintenance of the initial bad block table, the factory bad block table, and the working bad block table of the storage technology in the existing satellite engineering , Establish a mechanism for FLASH in the storage board to perform erasing and reading operations and to feed back bad block information to the storage control FPGA

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