Ternary content-addressable memory for multi-bit error detection circuits

Abstract

The present invention relates to a ternary content-addressable memory used in a multi-bit error detection circuit, which discloses a pre-charging circuit, including a first inverter receiving an early pre-charging signal and outputting an inverted early pre-charging signal, receiving A first gate that outputs a late precharge signal and a match line output signal and outputs an AND output signal, and a second gate that receives the inverted early precharge signal and the AND output signal and outputs a valid precharge signal.

Description

technical field [0001] The present invention relates to a ternary content addressable memory (TCAM) circuit, and more particularly to a ternary content addressable memory (TCAM) using a dual-phase precharge circuit for a multi-bit error detection circuit. Background technique [0002] Content-addressable memory (CAM) is a special type of computer memory used in high-speed search operations. The CAM is designed such that the user supplies a data word, and the CAM searches its entire memory to see if this data word is stored in the CAM. If the data word is found, the CAM returns a list of one or more memory addresses where the word was found. [0003] CAM is designed to search its entire memory in a single operation, making CAM faster than Random Access Memory (RAM) in most search operations. However, in CAM, each individual memory bit in parallel CAM must have its own associated compare circuit to detect a match between the stored bit and the incoming bit. Furthermore, the...

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Problems solved by technology

However, the push for higher performance and memory density coupled with already highly parallelized activations has created noise challenges that can cause timing failures in both the TCAM and its surrounding logic

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