A device and method for improving system startup speed
A start-up speed and low-latency technology, applied in the direction of program control devices, program loading/starting, instruments, etc., can solve problems such as limiting access frequency, increasing device start-up time, affecting the establishment time of CPU reading NANDFLASH data signals, etc., to achieve improvement The effect of reading operation speed and improving startup speed
Active Publication Date: 2021-06-11
ANHUI WANTONG POSTS & TELECOMM CO LTD
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Problems solved by technology
After the signal passes through the CPLD, it will bring a delay of about 20ns, which will affect the establishment time of the CPU to read the NANDFLASH data signal. The NANDFLASH controller in the CPU must increase the effective time of the read enable signal to meet the requirements of its own sampling data establishment time.
This undoubtedly prolongs the cycle for the CPU to read NANDFLASH, limits the CPU's access frequency to NANDFLASH, and increases the startup time of the device.
Method used
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[0015] The present invention will be further described below in conjunction with accompanying drawing:
[0016] Such as figure 2 As shown, a device for improving system startup speed described in this embodiment includes a central processing unit (CPU) 10 , a low-latency bidirectional level shifter 20 , NAND FLASH 30 , and a memory stick / memory particle 40 .
[0017] The NANDFLASH interface of the central processing unit (CPU) 10 is connected to the NANDFLASH30 after the low-latency level conversion chip 20 realizes the conversion from 1.8V to 3.3V. BOOT and software versions required for system startup are stored in NANDFLASH30.
[0018] After the system is powered on, the central processing unit (CPU) 10 selects to start from the NANDFLASH30 according to the configuration, and the central processing unit (CPU) 10 generates a timing sequence for accessing the NANDFLASH30 to obtain BOOT and software version.
[0019] When central processing unit (CPU) 10 writes to NANDFLASH...
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A device and method for increasing system startup speed can optimize the circuit structure, shorten the signal delay between CPU and NANDFLASH, increase the NANDFLASH access frequency, thereby increasing the startup speed of the entire system and improving user experience. Including CPU, low-latency level converter, NANDFLASH, memory stick / memory particle; wherein, the NANDFLASH signal of the CPU is connected to NANDFLASH after being level-converted by the low-latency level converter, and the memory stick / memory particle is directly connected to the central processing unit. Compared with the common use of CPLD for level conversion, the present invention uses a low-latency bidirectional level converter to realize the level conversion between the central processing unit (CPU) NANDFLASH interface and NANDFLASH, so that the central processing unit (CPU) and NANDFLASH The signal delay between them is reduced from 20ns to less than 10ns, and the central processing unit (CPU) can access NANDFLASH at a higher frequency, which improves the startup speed of the entire system.
Description
technical field [0001] The invention relates to the field of circuit design, in particular to a device and method for improving system start-up speed. Background technique [0002] In communication equipment, a common CPU small system circuit block diagram is as follows: figure 1 As shown, the small system includes a processor (CPU), a memory stick / memory particle, a programmable logic chip (CPLD), and NAND FLASH. The CPU is the core of the entire small system, and other circuits of the small system are served by it; memory sticks / memory particles are the space for program execution; CPLD is used to realize functions such as peripheral interface expansion and level conversion, and NAND FLASH is used to store BOOT and system Version. After the system is powered on, the CPU accesses NANDFLASH to obtain the information in it, so that the system can be started smoothly. The CPU's access speed to NANDFLASH directly determines the startup speed of the entire device. [0003] T...
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IPC IPC(8): G06F9/445G06F30/398
CPCG06F30/327
Inventor 潘樱子王娟
Owner ANHUI WANTONG POSTS & TELECOMM CO LTD