Provide expansion circuit board for expanding joint test working group interface

Abstract

The invention provides an extended circuit board providing extended joint test action group interfaces. By configuring test data input pins, test data output pins, test clock pins and test mode selection pins through a line and combining and controlling multiplexers and buffers, extended joint test action group interfaces are provided and controlled. Thus, extended joint test action group connection interfaces are provided, and the test requirement of a joint test action group is improved.

Description

technical field [0001] The present invention relates to an expansion circuit board, in particular to a combination of test data input pins, test data output pins, test clock pins and test mode selection pins through lines, multiplexers and buffers and control, providing an extended joint test workgroup interface and controlling the expanded joint test workgroup interface to provide an expanded circuit board for the extended joint test workgroup interface. Background technique [0002] The boundary scan test of a general circuit or the test of a socket using boundary scan is usually tested through a test access port controller, but the test access port controller generally only provides a limited number of test accesses port, if the boundary scan test of the circuit requires a large number of joint test workgroup interfaces, multiple test access port controllers need to be used, but the cost of such a test is relatively high, and if a limited number of test access port contro...

AI Technical Summary

Problems solved by technology

[0004] In view of the problem in the prior art that the number of test access ports provided by the existing test access port controllers is limited and cannot satisfy a large number of tests or satisfy a large number of tests but require high test costs, the present invention discloses a method that provides extended joint test work Expansion board for group interface, where:

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