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A dma self-test circuit

A self-test circuit and test data technology, applied in the direction of measuring electricity, measuring electrical variables, electronic circuit testing, etc., can solve problems such as inability to locate chip faults

Active Publication Date: 2020-06-09
西安翔腾微电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For some chips with complex functions, if the self-test fails, it is usually impossible to locate the chip fault

Method used

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  • A dma self-test circuit

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Experimental program
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Embodiment Construction

[0012] see figure 1 , the processor configures the mode register in the BIST register control module through the register interface, which can be configured as normal mode, send BIST (self-test) mode, receive BIST mode, host read BIST mode and host write BIST mode, and can configure the test length ( Less than 4K) registers and test address registers and self-test enable registers, where the test length register is used for all BIST modes except the receiving BIST mode, and the test address register refers to the address in the main memory for the host to read and write BIST mode, the self-test enable signal is a pulse signal, which is used for all other BIST modes except the receiving BIST mode.

[0013] In normal mode, the self-test circuit does not work. The sending DMA interface of the host (PCIe) is directly connected to the sending DMA channel, and the receiving DMA interface of the host (PCIe) is directly connected to the receiving DMA channel.

[0014] Host read BIST...

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Abstract

The invention provides a DMA self testing circuit for isolation testing on a host interface function and an FC protocol processing function of an FC-AE-ASM protocol processing chip. The DMA self testing circuit includes a self testing register control module, a host DMA interface read-write testing module and a sending and receiving DMA test module and an information interaction zone, wherein thehost DMA interface read-write testing module is electrically connected with a host DMA interface while the sending and receiving DMA test module is electrically connected with a sending interface channel. According to the invention, relative independent isolation test can be performed on an FC frame transceiving function and a host interface DMA function of the FC-AE-ASM chip.

Description

technical field [0001] The invention relates to a detection circuit, in particular to a DMA self-test circuit. Background technique [0002] A large number of self-test circuits are used in chip design. Through the self-test circuit function, some basic functions of the chip can be tested without the need for peripheral circuits on the chip. Through the self-test, you can judge whether the basic functions of the chip are normal. For some chips with complex functions, if the self-test fails, it is usually impossible to locate the chip fault. Contents of the invention [0003] The purpose of the present invention is to provide a DMA self-test circuit capable of realizing fault location. [0004] The technical scheme of the present invention: a DMA self-test circuit, the test circuit detects the function of the DMA channel, and is characterized in that the self-test circuit verifies whether the function of each DMA channel is normal by means of trial sending data. [0005]...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28
CPCG01R31/2856
Inventor 张荣华田泽郭亮刘浩张亮
Owner 西安翔腾微电子科技有限公司