A chip semi-automatic synchronization method and system
A synchronization system and semi-automatic technology, applied in the field of electronics, can solve the problem that the main chip cannot complete the synchronization function and affect the synchronization state of the AD9379 chip.
Active Publication Date: 2020-03-27
SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
View PDF7 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
However, the synchronization function of the AD9739 chip is limited by the internal delay line of the chip. At a sampling rate of 800MHz to 1100MHz, the main chip cannot complete the synchronization function and enter the synchronization state, which also affects other AD9379 chips entering the synchronization state.
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0021] All features disclosed in this specification, or steps in all methods or processes disclosed, may be combined in any manner, except for mutually exclusive features and / or steps.
[0022] Any feature disclosed in this specification, unless specifically stated, can be replaced by other alternative features that are equivalent or have similar purposes. That is, unless expressly stated otherwise, each feature is one example only of a series of equivalent or similar features.
[0023] For multiple AD9739 chips to achieve synchronization, first of all, the hardware design must ensure that the working clock, synchronization clock and data lines sent to the AD9739 chips are designed to be of equal length; secondly, the AD9739 chip semi-automatic synchronization method is used to configure the master chip and the slave chip.
[0024] The principle block diagram of chip synchronization is as follows: figure 1 As shown, multiple AD9739 chips use the same working clock, and the wo...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention discloses a chip semi-automatic synchronization method and system. After a chip is powered up, a master chip MU controller is configured at first, after the MU is locked, a master chip SYCN_OUT is controlled to output 4 phases, each phase is traversed to find a corresponding SYNC_IN effective window, the longest SYNC_IN effective window in the four output phases is found, the outputphase of the master chip SYNC_OUT is configured as a phase corresponding to the longest SYNC_IN effective window, meanwhile the SYNC_OUT output delay is configured as the central position of the effective window, a master chip Rx controller is configured, a lock state is reached, a slave chip MU controller is configured, the configuration parameters are the same as the configuration values of themaster chip MU, a slave chip synchronous controller is configured to work in an automatic slave chip mode, and it is ensured that the synchronous controller reaches a synchronous lock state, a slave chip Rx controller is configured, the lock state is reached. By adoption of the chip semi-automatic synchronization method and system disclosed by the invention, the synchronization problem of an AD9739 chip at a low sampling rate can be effectively solved, and it is ensured that multiple AD9739 chips can be normally synchronized at the sampling rate of 800 MHz to 1100 MHz.
Description
technical field [0001] The invention relates to the field of electronic technology, in particular to a chip semi-automatic synchronization method and system. Background technique [0002] The high-speed DAC (Digital To Analog Converter) chip AD9739 launched by ADI (Analog Devices Inc) has the characteristics of high sampling rate and high resolution. The chip supports multi-chip synchronization function. According to the chip manual, the chip operating frequency is 800MHz~ 2500MHz, the chip itself has the function of multi-chip synchronization. After power-on, configure the internal registers of AD9739 through the SPI control interface to achieve the function of synchronizing multiple AD9739 chips. However, the AD9739 chip's built-in synchronization function is limited by the internal delay line of the chip. At a sampling rate of 800MHz to 1100MHz, the main chip cannot complete the synchronization function and enter the synchronization state, which also affects other AD9379 ...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): H04J3/06
CPCH04J3/0685
Inventor 李斌纪小明
Owner SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP