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AES encryption unit, AES encryption circuit and encryption method

An encryption unit and encryption circuit technology, applied to encryption devices with shift registers/memory, electrical components, key distribution, and can solve problems such as increasing circuit area

Active Publication Date: 2018-12-11
ANHUI UNIVERSITY OF TECHNOLOGY AND SCIENCE
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0005] The embodiment of the present invention provides an AES encryption circuit based on a synthetic matrix, which aims to solve the problem that the existing AES encryption circuit based on a merge operation optimizes the length of the critical path at the cost of increasing the circuit area

Method used

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  • AES encryption unit, AES encryption circuit and encryption method
  • AES encryption unit, AES encryption circuit and encryption method
  • AES encryption unit, AES encryption circuit and encryption method

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Embodiment Construction

[0045] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0046] The existing computing units mainly include: row shift computing unit, column mixing computing unit, key adding computing unit, and byte replacement computing unit are all existing computing units, and the computing methods of the computing units are as follows:

[0047] 1. Row shift operation unit

[0048] The row shift operation unit performs row shift operation, which is a simple operation. In this operation, the first row of the state matrix does not change, and the second, third, and fourth rows are shifted to the left by one byte and two bytes respectively. , and three bytes. Suppose...

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Abstract

The invention is applicable to the field of encryption technology. An AES encryption unit, AES encryption circuit and encryption method are provided. An AES encryption unit is proposed. The AES encryption unit realizes 4 bytes AES encryption. The AES encryption unit combines all the linear transformations into two composite matrices by combining and synthesizing the constant matrices, namely the composite matrix delta and the composite matrix lambda, thereby shortening the critical path of the AES encryption circuit and reducing the area of the circuit.

Description

technical field [0001] The invention belongs to the technical field of encryption and provides an AES encryption unit, an AES encryption circuit and an encryption method. Background technique [0002] AES (Advanced Encryption Standard, Advanced Encryption Standard) is a new generation of block symmetric cipher algorithm formulated by the National Institute of Standards and Technology in 2001 to replace the original DES (Data Encryption Standard, Data Encryption Standard). At present, the AES encryption algorithm has been adopted by many international standard organizations, and it is currently the most widely used block encryption algorithm. [0003] The data packet length of the AES encryption algorithm is 128 bits, and the key lengths are 128, 192 and 256 bits, which are called AES-128, AES-192, and AES-256 respectively. The AES algorithm is an iterative algorithm. Each iteration can be called a round transformation. The key length is different, and the number of round tr...

Claims

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Application Information

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IPC IPC(8): H04L9/06H04L9/08
CPCH04L9/0631H04L9/0863H04L2209/12
Inventor 张肖强郑辛星郑群现刘宇畅王宸宇王维王广亮
Owner ANHUI UNIVERSITY OF TECHNOLOGY AND SCIENCE
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