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Method and system for obtaining internal delay ladder time of storage module

A storage module and delay time technology, applied in the communication field, can solve problems such as the inability to measure SOC chip registers, and achieve the effect of improving stability

Active Publication Date: 2022-04-01
AMOLOGIC (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Aiming at the problem that it is currently impossible to measure the unit ladder of the registers inside the SOC chip, a method and system for obtaining the internal delay ladder time of the storage module are now provided

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  • Method and system for obtaining internal delay ladder time of storage module
  • Method and system for obtaining internal delay ladder time of storage module
  • Method and system for obtaining internal delay ladder time of storage module

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Embodiment Construction

[0036] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0037] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0038] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0039] like figure 1 As shown, the present invention provides a method for obtaining the internal delay step ti...

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Abstract

The invention discloses a method and a system for acquiring the internal delay step time of a storage module, belonging to the technical field of communication. The method is as follows: the control unit sends clock signals to the storage unit in at least two different phases, and respectively delays the signal input interface of the control unit to obtain two boundaries of the signal input interface; The difference in the number of delay steps between two boundaries calculates the delay time of a delay step. In the present invention, by adjusting the phase of the clock signal sent by the control unit to the storage unit, and delaying the signal input interface of the control unit, the two boundaries of the corresponding signal input interface under different clock signal phases are obtained, and then according to the different clock signal phases Calculate the delay time of a single delay step according to the number of different delay steps below, so as to adjust the delay time of the control unit according to the delay time of the delay step obtained through actual calculation.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a method and system for acquiring the internal delay time of a storage module. Background technique [0002] In the use of SDIO (Secure Digital Input and Output Card, secure digital input and output card) interface, as the frequency increases, the problem of SDIO stability is gradually exposed. In practical applications, such as: when the SDIO unit reads signals to the SOC chip, although the unit step length of the internal delay can be obtained according to the specifications of the SOC chip (System-on-a-Chip), it is not necessarily accurate , if the time length of the unit ladder is wrong, it will cause misleading when setting the register, and then affect the stability of the system during the signal reading process. However, it is currently impossible to measure the unit ladder of the registers inside the SOC chip. Contents of the invention [0003] Aiming ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L43/0852
CPCH04L43/0852
Inventor 冯杰张坤
Owner AMOLOGIC (SHANGHAI) CO LTD
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