Method for forming channel hole of three-dimensional memory

A memory and channel technology, used in semiconductor devices, electrical solid-state devices, electrical components, etc., can solve the problems of too large CD of deep-hole channel holes, reduced distance between holes and too large top key size, etc. , to achieve the effect of good top width, reduced pattern size, and reduced etching difficulty
CN109545790BActive Publication Date: 2021-08-31YANGTZE MEMORY TECH CO LTD
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Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Patents(China)
Current Assignee / Owner
YANGTZE MEMORY TECH CO LTD
Publication Date
2021-08-31

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Abstract

The invention relates to a method for forming a channel hole of a three-dimensional memory, comprising: providing a substrate, a stack structure is formed on the surface of the substrate; forming a mask layer on the stack structure; etching the mask layer to On the surface of the stack structure, a first pattern with a first critical dimension is formed in the mask layer; a protective layer covering at least the sidewall surface of the etched pattern is formed, so that the size of the first pattern is reduced, forming a pattern with The second pattern of the second critical dimension: using the mask layer and the protective layer as a mask, etching the stacked structure to the substrate to form a channel hole. The above method can effectively control the size of the channel hole and reduce the difficulty of forming the channel hole.
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Description

technical field

[0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a channel hole of a three-dimensional memory. Background technique

[0002] In recent years, the development of flash memory (Flash Memory) is particularly rapid. The main feature of flash memory is that it can keep stored information for a long time without power on, and has the advantages of high integration, fast access speed, easy erasing and rewriting, etc. Has been widely used. In order to further increase the bit density (Bit Density) of the flash memory while reducing the bit cost (Bit Cost), three-dimensional flash memory (3D NAND) technology has been developed rapidly.

[0003] During the formation process of the three-dimensional memory, multiple layers of insulating layers and sacrificial layers stacked alternately are first formed on the surface of the substrate, and then the insulating layers and sacrificial layers are etched to form ch...

Claims

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