Semiconductor structure and preparation method thereof

Abstract

The invention provides a semiconductor structure and a preparation method thereof. The preparation method comprises the following steps: providing a semiconductor substrate; forming a stack structureon the semiconductor substrate, the stack structure comprising a plurality of stack pairs, each stack pair comprising a first stack unit and a second stack unit; forming a step structure in the stacked structure, the step structure comprising multiple steps, each step comprising at least one stacked layer pair, and the top surface of each step exposing the surface of the second stacked layer unitof the corresponding stacked layer pair; forming an etching buffer layer on the surface of the second lamination unit exposed by the step; and forming contact holes in the etching buffer layers at thesame time, wherein the contact holes expose the etching buffer layers. According to the invention, by arranging the etching buffer layer on the surface of the step, etching of all the contact holes can be completed simultaneously in one etching process, so that the process steps are simplified, the etching difficulty of the contact holes is reduced, and the cost is saved.

Description

technical field [0001] The invention belongs to the field of semiconductor design and manufacture, and in particular relates to a semiconductor structure and a preparation method thereof. Background technique [0002] In general, a three-dimensional memory includes a gate stack structure formed by alternately stacking gate layers and interlayer dielectric layers, and a contact column (Contact, CT for short) is electrically connected to the gate in a step region of the gate stack structure. However, in the actual manufacturing process of the three-dimensional memory, in order to achieve a good electrical connection between the connecting column and the gate layer in the stacked structure, it is first necessary to etch a contact hole in the dielectric layer covering the stacked gate structure until the contact hole is formed. The hole exposes the surface of the gate layer in the step region, and then the contact hole is filled with a metal material for forming a connecting col...

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Problems solved by technology

[0005] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor structure and its preparation method, which are used to solve the problem of complicated contact hole etching process, high cost and easy to cause gate Technical Problems of Electrode Breakdown

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