Manufacturing method of semiconductor device

Abstract

The invention provides a manufacturing method of a semiconductor device. The manufacturing method comprises the following steps: providing a substrate with a first stacking structure on a surface, forming a plurality of first channel through holes penetrating through the first stacking structure to a substrate, and forming a first filling layer in each first channel through hole; forming a first gate isolation groove penetrating through the first stack structure to the substrate, enabling the first gate isolation groove to be located between the adjacent first channel through holes, and forming a second filling layer in the first gate isolation groove; forming a second stacking structure on the first stacking structure, forming a second channel through hole penetrating through the second stacking structure to the first filling layer, and removing the first filling layer to enable the second channel through hole to be connected with the first channel through hole; and forming a second gate isolation groove penetrating through the second stack structure to the second filling layer, and removing the second filling layer to enable the second gate isolation groove to be connected with the first gate isolation groove. The step-by-step etching of the gate isolation groove can better control an etching key size, and the electrical performance of the device is ensured.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor device. Background technique [0002] In order to continuously increase memory density and capacity, and to reduce the key size of memory has certain physical limitations, many memory designers and manufacturers have changed the traditional 2D integration mode and adopted three-dimensional stacking technology to increase the storage density of NAND flash memory. [0003] In the current 3D NAND memory, a stacked 3D NAND memory structure is usually implemented by vertically stacking multiple layers of data storage units. In order to obtain the above-mentioned stacked 3D NAND memory structure, it is necessary to form a stacked structure in which sacrificial layers and isolation layers are stacked alternately on the silicon substrate, and etch the stacked structure to form a channel (CH). After forming the storage structure in the cha...

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Problems solved by technology

[0007] The main purpose of the present invention is to provide a method for manufacturing a semiconductor device to solve the problem in the prior art that the etching of deep grooves with high aspect ratios will lead to a decrease in the electrical performance of the device

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