Instruction execution method of processor and processor thereof
An instruction execution and processor technology, applied in the instruction execution method of the processor and the field of the processor, can solve the problems of large size and insufficient width-limited registers, etc.
Active Publication Date: 2020-12-01
ARM TECH CHINA CO LTD
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Problems solved by technology
Currently, there are problems in the design of pipelining as follows: First, how does an instruction-based fixed function write its result back to the architectural storage used by the traditional method registers
Width-constrained registers are not sufficient due to the potentially large size of the input and / or output data of ICs implementing fixed functions, e.g., feature maps outside convolutions in artificial intelligence (AI) neural networks (NNs)
Second, when using traditional instruction functions, there may be some synchronization between instructions implementing a fixed-function IC and instructions on other pipelines
Method used
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[0093] In the following description, many technical details are proposed for readers to better understand the present invention. However, those skilled in the art can understand that even without these technical details and various changes and modifications based on the following embodiments, the technical solution required by each claim of the present invention can also be realized.
[0094] In order to make the purpose, technical solution and advantages of the present invention clearer, the following will further describe the implementation of the present invention in detail in conjunction with the accompanying drawings.
[0095] It can be understood that, in various embodiments of the present invention, the processor can be used in various computing devices. Preferably, the processor is a domain-specific processor for implementing a fixed-function integrated circuit.
[0096] In addition, it can be understood that in various embodiments of the present invention, the storage...
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An instruction execution method for a processor and the processor. The method comprises: obtaining the content of a description field in a current instruction (101); obtaining a description item corresponding to the content of the description field (102); and on the basis of an address for storing data in the obtained description item, reading from the address input data required for executing the current instruction, or writing back result data obtained by executing the current instruction to the address (103). In the method, a specific function of supporting input and output of large volumes of data can be realized by means of execution of the instruction.
Description
technical field [0001] The invention relates to the field of computers, in particular to a processor instruction execution method and a processor thereof. Background technique [0002] To achieve better performance and power efficiency, computing architectures have evolved from traditional general-purpose processing architectures to domain-specific architectures. During the evolution, with the addition of hardware acceleration to traditional arithmetic logic units (ALUs), there has been an increased need for integrated circuits (ICs) to implement fixed functions. Currently, there are problems in the design of pipelining as follows: First, how does an instruction-based fixed function write its result back to the architectural storage used by the traditional method registers. Width-constrained registers are not sufficient since the input and / or output data of ICs implementing fixed functions can be of large size, for example, feature maps outside convolutions in artificial in...
Claims
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IPC IPC(8): G06F9/30
CPCG06F9/30047
Inventor 游骅孙锦鸿
Owner ARM TECH CHINA CO LTD